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ADG2188BCPZ-HS-RL7 Datasheet(PDF) 10 Page - Analog Devices |
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ADG2188BCPZ-HS-RL7 Datasheet(HTML) 10 Page - Analog Devices |
10 / 28 page ADG2188 Rev. 0 | Page 10 of 28 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS NC = NO CONNECT NC VDD NC NC NC NC X7 X6 X3 X1 X0 NC X5 X4 X2 VSS 1 2 3 4 5 6 7 8 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 9 1011 13141516 12 PIN 1 INDICATOR ADG2188 8 × 8 TOP VIEW (Not to Scale) Exposed Paddle Soldered to VSS Figure 3. Pin Configuration Table 5. Pin Function Descriptions1 Pin No. Mnemonic Description 1 VSS Negative Power Supply in a Dual-Supply Application. For single-supply applications, this pin should be tied to GND. 2, 19 to 23 NC No Connect. 3 to 8, 17, 18 X0 to X7 Can be inputs or outputs. 9 to 16 Y0 to Y7 Can be inputs or outputs. 24 VDD Positive Power Supply Input. 25 VL Logic Power Supply Input. 26 SDA Digital I/O. Bidirectional open drain data line. External pull-up resistor required. 27 SCL Digital Input, Serial Clock Line. Open drain input that is used in conjunction with SDA to clock data into the device. External pull-up resistor required. 28 A0 Logic Input. Address pin that sets the least significant bit of the 7-bit slave address. 29 A1 Logic Input. Address pin that sets the second least significant bit of the 7-bit slave address. 30 A2 Logic Input. Address pin that sets the third least significant bit of the 7-bit slave address. 31 RESET Active Low Logic Input. When this pin is low, all switches are open, and appropriate registers are cleared to 0. 32 GND Ground. Reference point for all circuitry on the ADG2188. 1 It is recommended that the exposed paddle be soldered to VSS to improve heat dissipation and crosstalk. |
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