© Semiconductor Components Industries, LLC, 2005

October, 2005 − Rev. 1

1

Publication Order Number:

CS5165A/D

CS5165A

5−Bit Synchronous CPU

Buck Controller

The CS5165A synchronous 5−bit NFET buck controller is

optimized to manage the power of the next generation Pentium II

t control architecture delivers the fastest transient

response (100 ns), and best overall voltage regulation in the industry

today. It’s feature rich design gives end users the maximum flexibility

to implement the best price/performance solutions for their end

products.

The CS5165A has been carefully crafted to maximize performance and

protect the processor during operation. It has a 5−bit DAC on board that

holds a

±1.0% tolerance over temperature. Its on board programmable

Soft−Start insures a control startup, and the FET nonoverlap circuitry

ensures that both FETs do not conduct simultaneously.

The on board oscillator can be programmed up to 1.0 MHz to give

the designer maximum flexibility in choosing external components

and setting systems costs.

The CS5165A protects the processor during potentially catastrophic

events like overvoltage (OVP) and short circuit. The OVP feature is

components. During short circuit, the controller pulses the MOSFETs

in a “hiccup” mode (3.0% duty cycle) until the fault is removed. With

this method, the MOSFETs do not overheat or self destruct.

The CS5165A is designed for use in both single processor desktop and

multiprocessor workstation and server applications. The CS5165A’s

current sharing capability allows the designer to build multiple parallel

and redundant power solutions for multiprocessor systems.

The CS5165A contains other control and protection features such as

Power Good, ENABLE, and adaptive voltage positioning. It is

available in a 16 lead SOIC wide body package.

Features

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

CS5165A

= Device Code

A

= Assembly Location

WL

= Wafer Lot

YY

= Year

WW

= Work Week

G

= Pb−Free Package

PIN CONNECTIONS

SO−16WB

DW SUFFIX

CASE 751G

MARKING

DIAGRAM

ENABLE

1

16

GATE(H)

PGND

GATE(L)

SS

PWRGD

LGND

COMP

1

16

http://onsemi.com

16

1

CS5165A

AWLYYWWG

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

Device

Package

ORDERING INFORMATION

CS5165AGDW16

SOIC−16

47 Units/Rail

CS5165AGDWR16

SOIC−16 1000/Tape & Reel

CS5165AGDWR16G

SOIC−16

(Pb−Free)

1000/Tape & Reel

CS5165AGDW16G

SOIC−16

(Pb−Free)

47 Units/Rail