CS5165A

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9

capacitor begins charging. The GATE(H) output will remain

on, enabling the NFET switch, until terminated by either the

PWM comparator, or the maximum on time timer.

If the maximum on time is exceeded before the regulator

output voltage achieves the 1.0 V level, the pulse is terminated.

The GATE(H) pin drives low, and the GATE(L) pin drives high

for the duration of the extended off time. This time is set by the

time out timer and is approximately equal to the maximum on

time, resulting in a 50% duty cycle. The GATE(L) pin will then

drive low, the GATE(H) pin will drive high, and the cycle

repeats.

When regulator output voltage achieves the 1.0 V level

present at the COMP pin, regulation has been achieved and

normal off time will ensue. The PWM comparator terminates

ensure the regulator output voltage tracks the output of the

error amplifier.

The Soft−Start and COMP capacitors will charge to their

final levels, providing a controlled turn on of the regulator

output. Regulator turn on time is determined by the COMP

capacitor charging to its final value. Its voltage is limited by the

Soft−Start COMP clamp and the voltage on the Soft−Start pin.

Power Supply Sequencing

The CS5165A offers inherent protection from undefined

startup conditions, regardless of the 12 V and 5.0 V supply

power up sequencing. The turn on slew rates of the 12 V and

5.0 V power supplies can be varied over wide ranges without

affecting the output voltage or causing detrimental effects to

the buck regulator.

Figure 10. Demonstration Board Startup in

Response to Increasing 12 V and 5.0 V Input

Voltages. Extended Off Time is Followed by Normal

Off Time Operation when Output Voltage Achieves

Regulation to the Error Amplifier Output.

M 250

ms

Trace 1− Regulator Output Voltage (1.0 V/div.)

Trace 4− 5.0 V Input (1.0 V/div.)

Trace 2− Inductor Switching Node (2.0 V/div.)

Figure 11. Demonstration Board Startup Waveforms

Trace 2− COMP PIn (error amplifier output) (1.0 V/div.)

Trace 1− Soft−Start Pin (2.0 V/div.)

Trace 4− Regulator Output Voltage (1.0 V/div.)

Figure 12. Demonstration Board Enable Startup

Waveforms

M 10.0

ms

Trace 1− Regulator Output Voltage (1.0 V/div.)

Trace 2− Inductor Switching Node (5.0 V/div.)

Normal Operation

During normal operation, switch off time is constant and

in regulator switching frequency, duty cycle, and output

ripple in response to changes in load and line. Output voltage

ripple will be determined by inductor ripple current working

and the ESR of the output capacitors (see Figures 13 and 14).