© Semiconductor Components Industries, LLC, 2004

June, 2004 − Rev. 5

1

Publication Order Number:

CS5253B−1/D

CS5253B−1

3.0 A LDO 5−Pin Adjustable

Linear Regulator with

Remote Sense Applications

This new very low dropout linear regulator reduces total power

dissipation in the application. To achieve very low dropout, the

internal pass transistor is powered separately from the control

circuitry. Furthermore, with the control and power inputs tied together,

this device can be used in single supply configuration and still offer a

better dropout voltage than conventional PNP − NPN based LDO

regulators. In this mode the dropout is determined by the minimum

control voltage.

which allows for the implementation of a remote−sense pin permitting

very accurate regulation of output voltage directly at the load, where it

counts, rather than at the regulator. This remote sensing feature

virtually eliminates output voltage variations due to load changes and

resistive voltage drops. Typical load regulation measured at the sense

pin is less than 1.0 mV for an output voltage of 2.5 V with a load step

of 10 mA to 3.0 A.

The CS5253B−1 has a very fast transient loop response which can

be adjusted using a small capacitor on the Adjust pin.

Internal protection circuitry provides for “bust−proof” operation,

similar to three−terminal regulators. This circuitry, which includes

overcurrent, short circuit, and overtemperature protection will

self protect the regulator under all fault conditions.

The CS5253B−1 is ideal for generating a 2.5 V supply to power

graphics controllers used on VGA cards. Its remote sense and low

value capacitance requirements make this a low cost, high

performance solution. The CS5253B−1 is optimized from the

CS5253−1 to allow a lower value of output capacitor to be used at the

expense of a slower transient response.

Features

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

MARKING DIAGRAM

A

= Assembly Location

WL

= Wafer Lot

Y

= Year

WW

= Work Week

2. Adjust

DP SUFFIX

CASE 936AC

1

5

CS5253B−1GDP5

50 Units/Rail

CS5253B−1GDPR5

CS

5253B−1

AWLYWW

1

http://onsemi.com

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

Device

Package

ORDERING INFORMATION

CS5253B−1GDPR5G

(Pb−Free)

750 Tape & Reel