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ADM3232EARUZ Datasheet(PDF) 8 Page - Analog Devices |
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ADM3232EARUZ Datasheet(HTML) 8 Page - Analog Devices |
8 / 12 page ADM3232E Rev. 0 | Page 8 of 12 THEORY OF OPERATION The ADM3232E is a single-channel RS-232 line driver/receiver. Step-up voltage converters, coupled with level-shifting transmitters and receivers, allow RS-232 levels to be developed while operating from a single 3.3 V supply. CMOS technology is used to keep the power dissipation to an absolute minimum, allowing maximum battery life in portable applications. CIRCUIT DESCRIPTION The internal circuitry consists of the following main sections: • A charge pump voltage converter • A 3.3 V logic to RS-232 transmitter • An RS-232 to 3.3 V logic receiver Charge Pump DC-DC Voltage Converter The charge pump voltage converter consists of a 200 kHz oscillator and a switching matrix. The converter generates a ±6.6 V supply from the input 3.3 V level. This is done in two stages by using a switched capacitor technique as shown in Figure 10. First, the 3.3 V input supply is doubled to 6.6 V by using Capacitor C1 as the charge storage element. The +6.6 V level is then inverted to generate −6.6 V, using C2 as the storage element. C3 is shown connected between V+ and VCC, but it is equally effective if connected between V+ and GND. Capacitor C3 and Capacitor C4 are used to reduce the output ripple. Their values are not critical and can be increased, if desired. Capacitor C3 is shown connected between V+ and VCC. It is also acceptable to connect this capacitor between V+ and GND. If desired, larger capacitors (up to 10 μF) can be used for Capacitor C1 to Capacitor C4. C1+ C2+ C1– C2– VCC V– V+ T1IN T1OUT T2IN T2OUT R1OUT R1IN R2OUT R2IN TTL/CMOS INPUTS RS-232 OUTPUTS TTL/CMOS OUTPUTS RS-232 INPUTS* T1 T2 R1 R2 + + 0.1µF 10V 0.1µF 10V GND ADM3232E C3 0.1µF 6.3V +3.3V INPUT +3.3V TO +6.6V VOLTAGE DOUBLER +6.6V TO –6.6V VOLTAGE INVERTER C5 0.1µF C4 0.1µF 10V *INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT. 5kΩ 5kΩ Figure 10. Typical Operating Circuit C1 + C3 + S3 S4 S1 S2 INTERNAL OSCILLATOR VCC GND VCC V+ = 2VCC Figure 11. Charge Pump Voltage Doubler C2 + C4 + S3 S4 S1 S2 INTERNAL OSCILLATOR V+ GND V– = –(V+) GND FROM VOLTAGE DOUBLER Figure 12. Charge Pump Voltage Inverter Transmitter (Driver) Section The drivers convert 3.3 V logic input levels into RS-232 output levels. With VCC = 3.3 V and driving an RS-232 load, the output voltage swing is typically ±6 V. Receiver Section The receivers are inverting level-shifters that accept RS-232 input levels and translate them into 3 V logic output levels. The inputs have internal 5 kΩ pull-down resistors to ground and are also protected against overvoltages up to ±30 V. Unconnected inputs are pulled to 0 V by the internal 5 kΩ pull-down resistor. This results in a Logic 1 output level for unconnected inputs or for inputs connected to GND. The receivers have Schmitt trigger inputs with a hysteresis level of 0.4 V. This ensures error-free reception for both noisy inputs and for inputs with slow transition times. ESD Protection on RS-232 and TTL/CMOS I/O Pins All RS-232 (T_OUT and R_IN) and TTL/CMOS (T_IN and R_OUT) inputs and outputs are protected against electrostatic discharges (up to ±15 kV). This ensures compliance with IEC 1000-4-2 requirements. HIGH BAUD RATE The ADM3232E features high slew rates, permitting data trans- mission at rates well in excess of the EIA-232E specifications. RS-232 voltage levels are maintained at data rates up to 460 kbps, even under worst-case loading conditions. This allows high speed data links between two terminals and is suitable for the new generation ISDN modem standards that require data rates of 230 kbps. The slew rate is internally controlled to less than 30 V/μs to minimize EMI interference. |
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