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AD5370BCPZ Datasheet(PDF) 1 Page - Analog Devices |
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AD5370BCPZ Datasheet(HTML) 1 Page - Analog Devices |
1 / 24 page 40-Channel, 16-Bit, Serial Input, Voltage-Output DACs Preliminary Technical Data AD5370 Rev. P rF Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2006 Analog Devices, Inc. All rights reserved. FEATURES 40-channel DAC in 64 Lead LFCSP and LQFP Guaranteed monotonic to 16 bits Maximum output voltage span of 4 × VREF (20 V) Nominal output voltage range of -4 V to +8 V Multiple, independent output span available System calibration function allowing user-programmable offset and gain Clear function to user-defined SIGGND (CLR pin) Simultaneous update of DAC outputs (LDAC pin) Channel grouping and addressing features Thermal Monitor Function DSP/microcontroller-compatible serial interface 2.5 V to 5.5 V JEDEC-compliant digital levels Power-on reset Digital reset (RESET) APPLICATIONS Level setting in automatic test equipment (ATE) Variable optical attenuators (VOA) Optical switches Industrial control systems Instrumentation FUNCTIONAL BLOCK DIAGRAM CONTROL REGISTER STATE MACHINE 16 POWER-ON RESET SYNC SDI SCLK SDO BUSY RESET CLR AD5370 SERIAL INTERFACE 16 VOUT8 VOUT9 VOUT10 VOUT11 VOUT12 VOUT13 VOUT14 VOUT15 SIGGND1 DAC 0 REGISTER 16 16 8 8 TO MUX 2's A/B SELECT REGISTER MUX 2 X2A REGISTER X2B REGISTER OFS1 REGISTER 14 14 DAC 0 OUTPUT BUFFER AND POWER DOWN CONTROL OUTPUT BUFFER AND POWER DOWN CONTROL OFFSET DAC 1 BUFFER DAC 7 REGISTER 16 16 MUX 2 X2A REGISTER X2B REGISTER DAC 7 · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · GROUP 1 VREF0 SIGGND0 SIGGND2 SIGGND4 SIGGND3 VOUT0 VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 VOUT6 VOUT7 VOUT16 TO VOUT39 GROUP 2 TO GROUP 4 ARE IDENTICAL TO GROUP 1 LDAC DVCC VDD VSS AGND DNGD DAC 0 REGISTER 16 16 8 8 TO MUX 2's A/B SELECT REGISTER MUX 2 X2A REGISTER X2B REGISTER OFS0 REGISTER 14 14 DAC 0 OUTPUT BUFFER AND POWER DOWN CONTROL OUTPUT BUFFER AND POWER DOWN CONTROL OFFSET DAC 0 BUFFER GROUP 0 · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · DAC 7 REGISTER 16 16 MUX 2 X2A REGISTER X2B REGISTER DAC 7 BUFFER VREF1 5370-0001C VREF1 SUPPLIES GROUP 1 TO GROUP 4 16 16 16 16 16 16 16 A/B MUX X1 REGISTER MREGISTER CREGISTER 16 16 16 16 16 16 16 A/B MUX X1 REGISTER MREGISTER CREGISTER 16 16 16 16 16 16 16 A/B MUX X1 REGISTER MREGISTER CREGISTER 16 16 16 16 16 16 16 A/B MUX X1 REGISTER MREGISTER CREGISTER Figure 1. AD5370—Protected by U.S. Patent No. 5,969,657; other patents pending |
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