NCP1406

http://onsemi.com

3

Figure 4. Representative Block Diagram

LX

PFM ON/OFF

Timing

Control

Driver

+

−

TSD

FB Fault

Protection

VDD

UVLO

+

−

Vref

Soft−Start

PFM

Comparator

CE

GND

FB

PIN FUNCTION DESCRIPTION

Pin

Symbol

Description

1

CE

Chip Enable Pin

(1) The chip is enabled if a voltage which is equal to or greater than 0.9 V is applied.

(2) The chip is disabled if a voltage which is less than 0.3 V is applied.

(3) The chip will be enabled if it is left floating.

2

FB

PFM comparator inverting input, and is connected to off−chip resistor divider which sets output voltage.

3

VDD

Power supply pin for internal circuit.

4

GND

Ground pin.

5

LX

External inductor connection pin.

MAXIMUM RATINGS

Rating

Symbol

Value

Unit

Power Supply Voltage (Pin 3)

VDD

−0.3 to 6.0

V

Input/Output Pin

LX (Pin 5)

LX Peak Sink Current

FB (Pin 2)

−0.3 to 27

1.5

−0.3 to 6.0

V

A

V

CE (Pin 1)

Input Voltage Range

−0.3 to 6.0

V

Power Dissipation and Thermal Characteristics

Thermal Resistance, Junction−to−Air

500

250

mW

_C/W

Operating Ambient Temperature Range

−40 to +85

_C

Operating Junction Temperature Range

−40 to +150

_C

Storage Temperature Range

−55 to +150

_C

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values

(not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage

may occur and reliability may be affected.

1. This device series contains ESD protection and exceeds the following tests:

Human Body Model (HBM)

"2.0 kV per JEDEC standard: JESD22−A114 for all pins.

Machine Model (MM)

"200 V per JEDEC standard: JESD22−A115 for all pins.

2. Latchup Current Maximum Rating:

"150 mA per JEDEC standard: JESD78.

3. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A.