NCP1422

http://onsemi.com

10

APPLICATIONS INFORMATION

Output Voltage Setting

A typical application circuit is shown in Figure 23. The

output voltage of the converter is determined by the

external feedback network comprised of R1 and R2. The

relationship is given by:

VOUT + 1.20 V

1

) R1

R2

where R1 and R2 are the upper and lower feedback

resistors, respectively.

Low Battery Detect Level Setting

The Low Battery Detect Voltage of the converter is

determined by the external divider network that is

comprised of R3 and R4. The relationship is given by:

VLB + 1.20 V

1

) R3

R4

where R3 and R4 are the upper and lower divider resistors

respectively.

Inductor Selection

The NCP1422 is tested to produce optimum performance

with a 5.6

supplying an output current up to 800 mA. For other

input/output requirements, inductance in the range 3

mH to

10

mH can be used according to end application

specifications. Selecting an inductor is a compromise

between output current capability, inductor saturation

limit, and tolerable output voltage ripple. Low inductance

values can supply higher output current but also increase

the ripple at output and reduce efficiency. On the other

hand, high inductance values can improve output ripple

and efficiency; however, it is also limited to the output

current capability at the same time.

Another parameter of the inductor is its DC resistance.

This resistance can introduce unwanted power loss and

reduce overall efficiency. The basic rule is to select an

inductor with the lowest DC resistance within the board

space limitation of the end application. In order to help with

the inductor selection, reference charts are shown in

Figures 24 and 25.

Capacitors Selection

In all switching mode boost converter applications, both

the

input

and

output

terminals

see

impulsive

voltage/current waveforms. The currents flowing into and

out of the capacitors multiply with the Equivalent Series

Resistance (ESR) of the capacitor to produce ripple voltage

at the terminals. During the Syn−Rect switch−off cycle, the

charges stored in the output capacitor are used to sustain the

output load current. Load current at this period and the ESR

combine and reflect as ripple at the output terminals. For

all cases, the lower the capacitor ESR, the lower the ripple

voltage at output. As a general guideline, low ESR

capacitors should be used. Ceramic capacitors have the

lowest ESR, but low ESR tantalum capacitors can also be

used as an alternative.

PCB Layout Recommendations

Good PCB layout plays an important role in switching

mode power conversion. Careful PCB layout can help to

minimize ground bounce, EMI noise, and unwanted

feedback that can affect the performance of the converter.

Hints suggested below can be used as a guideline in most

situations.

Grounding

A star−ground connection should be used to connect the

output power return ground, the input power return ground,

and the device power ground together at one point. All

high−current paths must be as short as possible and thick

enough to allow current to flow through and produce

insignificant voltage drop along the path. The feedback

signal path must be separated from the main current path

and sense directly at the anode of the output capacitor.

Components Placement

Power components (i.e., input capacitor, inductor and

output capacitor) must be placed as close together as

possible. All connecting traces must be short, direct, and

thick. High current flowing and switching paths must be

kept away from the feedback (FB, pin 1) terminal to avoid

unwanted injection of noise into the feedback path.

Feedback Network

Feedback of the output voltage must be a separate trace

detached from the power path. The external feedback

network must be placed very close to the feedback (FB,

pin 1) pin and sense the output voltage directly at the anode

of the output capacitor.