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NCP5306 Datasheet(PDF) 7 Page - ON Semiconductor |
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NCP5306 Datasheet(HTML) 7 Page - ON Semiconductor |
7 / 24 page NCP5306 http://onsemi.com 7 ELECTRICAL CHARACTERISTICS (continued) (0°C < TA < 70°C; 0°C < TJ < 125°C; 9.5 V < VCC < 14 V; CGATEx = 100 pF, CCOMP = 0.01μF, CSS = 0.1μF, CVCC = 0.1μF, RROSC = 32.4 kΩ, VOCSET = 0.54 V, DAC Code 01110; unless otherwise stated.) Parameter Unit Max Typ Min Test Conditions Current Sense Amplifiers OCSET Input Bias Current OCSET = 0 V − 0.1 1.0 μA Current Sense Input to OCSET Gain OCSET/(CSx−CSREF), 0.25 V < OCSET < 0.6 V, GATEx not switching 3.2 3.7 4.3 V/V Current Limit Filter Slew Rate CSREF = 1.1 V, CSx = 1.0 V, pulse CSx to 1.16 V, Note 5. 2.0 5.0 13 mV/μs General Electrical Specification VCC Operating Current COMP = 0.3 V (no switching) − 20 30 mA UVLO Start Threshold SS Charging Gates Switching 8.5 9.0 9.5 V UVLO Stop Threshold Gates not switching, SS & COMP discharging 7.5 8.0 8.5 V UVLO Hysteresis Start−Stop 0.8 1.0 1.2 V 5. Guaranteed by design. Not tested in production. PACKAGE PIN DESCRIPTION Pin Number Pin Symbol Pin Name Function 1 GND Ground IC power supply return. Connected to IC substrate. 2 OCSET Overcurrent Set Resistor divider from ROSC to GND. Programs the threshold of the hiccup overcurrent protection. 3 ROSC Oscillator Frequency Adjust ROSC is a regulated 1.0 V output and programs the oscillator frequency with a resistor to GND. 4−6 CS3−CS1 Current Sense Inputs Non−inverting inputs to the current sense amplifiers. 7, 20 NC No Connect Pins not connected to IC. 8 CSREF Current Sense Reference Inverting input to the current sense amplifiers and reference for Power Good. 9 VDRP Current Sense Amp Output Programs the voltage drop due to loading. A resistor from VDRP to FB programs the amount of Adaptive Voltage Positioning. Omitting this resistor defeats the AVP function. 10 VFB Voltage Feedback Error Amplifier inverting input. Input bias current is used to program AVP light load offset via a resistor connected to the converter output voltage. 11 COMP Error Amp Output and PWM Comparator Input Provides loop compensation and is clamped by SS. 12 SS Soft Start Controls fault timing and startup. 13 PWRGD Power Good Output Open collector output, which is “low” when the converter output is out of regulation. 14 PWRGDS Power Good Sense A resistor divider from VOUT to GND programs the Power Good lower threshold. 15−19 VID4−VID0 DAC VID Inputs TTL−compatible logic input used to program the converter output voltage. Internal 50 kΩ pull−ups to 3.3 V via a blocking diode are provided. All high generates fault. 21−23 GATE3−1 Channel Outputs PWM outputs to drive FET driver IC. 24 VCC Supply Input IC bias input. |
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