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74AVC16836ADGV Datasheet(PDF) 3 Page - NXP Semiconductors |
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74AVC16836ADGV Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 11 page Philips Semiconductors Product data 74AVC16836A 20-bit registered driver with inverted register enable and Dynamic Controlled Outputs ™ (3-State) 2002 Aug 02 3 PIN DESCRIPTION PIN NUMBER SYMBOL NAME AND FUNCTION 28 NC No connection 2, 3, 5, 6, 8, 9, 10, 12, 13, 14, 15, 16, 17, 19, 20, 21, 23, 24, 26, 27 Y0 to Y19 Data outputs 4, 11, 18, 25, 32, 35, 39, 46, 53 GND Ground (0V) 7, 22, 35, 50 VCC Positive supply voltage 1 OE Output enable input (active LOW) 29 LE Latch enable input (active LOW) 56 CP Clock input 55, 54, 52, 51, 49, 48, 47, 45, 44, 43, 42, 41, 40, 38, 37, 36, 34, 33, 31, 30 A0 to A19 Data inputs LOGIC SYMBOL SH00201 CP LE D OE LE A1 Y1 TO THE 17 OTHER CHANNELS CP TYPICAL INPUT (DATA OR CONTROL) SH00200 A1 VCC LOGIC SYMBOL (IEEE/IEC) 1 ∇ 1 56 29 54 52 51 49 48 47 45 44 43 42 41 40 38 37 36 34 33 55 2 3 5 6 8 9 10 12 13 14 15 16 17 19 20 21 23 24 3D 1 2C3 EN1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 OE CP Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 Y10 Y11 Y12 Y13 Y14 Y15 Y16 Y17 LE C3 G2 SH00160 A18 A19 Y18 Y19 26 27 31 30 FUNCTION TABLE INPUTS OUTPUTS OE LE CP A OUTPUTS H X X X Z L L X L L L L X H H L H ↑ L L L H ↑ H H L H H X Y01 L H L X Y02 H = HIGH voltage level L = LOW voltage level X = Don’t care Z = High impedance “off” state ↑ = LOW-to-HIGH level transition NOTES: 1. Output level before the indicated steady-state input conditions were established, provided that CP is high before LE goes low. 2. Output level before the indicated steady-state input conditions were established. |
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