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AD9398KSTZ-150 Datasheet(PDF) 9 Page - Analog Devices |
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AD9398KSTZ-150 Datasheet(HTML) 9 Page - Analog Devices |
9 / 44 page AD9398 Rev. 0 | Page 9 of 44 DESIGN GUIDE GENERAL DESCRIPTION The AD9398 is a fully integrated solution for receiving DVI/HDMI signals and is capable of decoding HDCP- encrypted signals through connections to an external EEPROM. The circuit is ideal for providing an interface for HDTV monitors or as the front end to high performance video scan converters. Implemented in a high performance CMOS process, the interface can capture signals with pixel rates of up to 150 MHz. The AD9398 includes all necessary circuitry for decoding TMDS signaling including those encrypted with HDCP. Included in the output formatting is a color space converter (CSC), which accommodates any input color space and can output any color space. All controls are programmable via a 2- wire serial interface. Full integration of these sensitive mixed signal functions makes system design straight-forward and less sensitive to the physical and electrical environments. DIGITAL INPUTS The digital control inputs (I2C) on the AD9398 operate to 3.3 V CMOS levels. In addition, all digital inputs, except the TMDS (HDMI/DVI) inputs, are 5 V tolerant (applying 5 V to them does not cause damage.) The TMDS input pairs (Rx0+/Rx0−, Rx1+/Rx1−, Rx2+/Rx2−, and RxC+/RxC−) must maintain a 100 Ω differential impedance (through proper PCB layout) from the connector to the input where they are internally terminated (50 Ω to 3.3 V). If additional ESD protection is desired, use of a California Micro Devices (CMD) CM1213 (among others) series low capacitance ESD protection offers 8 kV of protection to the HDMI TMDS lines. SERIAL CONTROL PORT The serial control port is designed for 3.3 V logic. However, it is tolerant of 5 V logic signals. OUTPUT SIGNAL HANDLING The digital outputs operate from 1.8 V to 3.3 V (VDD). POWER MANAGEMENT The AD9398 uses the activity detect circuits, the active interface bits in the serial bus, the active interface override bits, the power-down bit, and the power-down pin to determine the correct power state. There are four power states: full power, seek mode, auto power-down, and power-down. Table 7 summarizes how the AD9398 determines the power mode to use and which circuitry is powered on/off in each of these modes. The power- down command has priority and then the automatic circuitry. The power-down pin (Pin 81—polarity set by Register 0x26[3]) can drive the chip into four power-down options. Bit 2 and Bit 1 of Register 0x26 control these four options. Bit 0 controls whether the chip is powered down or the outputs are placed in high impedance mode (with the exception of SOG). Bit 7 to Bit 4 of Register 0x26 control whether the outputs, SOG, Sony Philips digital interface (SPDIF ) or Inter-IC sound bus (I2S or IIS) outputs are in high impedance mode. See the 2-Wire Serial Control Register Detail section for the details. Table 7. Power-Down Mode Descriptions Inputs Mode Power-Down1 Sync Detect2 Auto PD Enable3 Power-On or Comments Full Power 1 1 X Everything Seek Mode 1 0 0 Everything Seek Mode 1 0 1 Serial bus, sync activity detect, SOG, band gap reference Power-Down 0 X Serial bus, sync activity detect, SOG, band gap reference 1 Power-down is controlled via Bit 0 in Serial Bus Register 0x26. 2 Sync detect is determined by OR’ing Bit 7 to Bit 2 in Serial Bus Register 0x15. 3 Auto power-down is controlled via Bit 7 in Serial Bus Register 0x27. |
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Similar Description - AD9398KSTZ-150 |
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