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AD9704 Datasheet(PDF) 5 Page - Analog Devices

Part No. AD9704
Description  8-/10-/12-/14-Bit, 175 MSPS TxDAC D/A Converters
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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AD9704/AD9705/AD9706/AD9707
Rev. 0 | Page 5 of 52
AD9707
AD9706
AD9705
AD9704
Parameter
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Supply Current Clock Power-
Down Mode (IDVDD)5
0.6
1
0.6
1
0.6
1
0.6
1
mA
Supply Current Clock Power-
Down Mode (ICLKVDD)
42.5
58
42.5
58
42.5
58
42.5
58
μA
Power Supply Rejection Ratio
(AVDD)6
−0.2
+0.03
+0.2
−0.2
+0.03
+0.2
−0.2
+0.03
+0.2
−0.2
+0.03
+0.2
% of FSR/V
OPERATING RANGE
−40
+85
−40
+85
−40
+85
−40
+85
°C
1 Measured at IOUTA, driving a virtual ground, at 25
°C only.
2 Nominal full-scale current, IOUTFS, is 32× the IREF current.
3 An external buffer amplifier with input bias current < 100 nA should be used to drive any external load.
4 Measured at fCLOCK = 175 MSPS and fOUT = 1.0 MHz, using differential clock.
5 Measured at fCLOCK = 100 MSPS and fOUT = 1.0 MHz, using differential clock.
6 ±5% power supply variation.
DYNAMIC SPECIFICATIONS (3.3 V)
TMIN to TMAX, AVDD = 3.3 V, DVDD = 3.3 V, CLKVDD = 3.3 V, IOUTFS = 2 mA, differential transformer coupled output,
453 Ω differentially terminated,1 unless otherwise noted.
Table 2.
AD9707
AD9706
AD9705
AD9704
Parameter
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
Maximum Output Update Rate (fCLOCK)
175
175
175
175
MSPS
Output Settling Time (tST) (to 0.1%)2
11
11
11
11
ns
Output Propagation Delay (tPD)
4
4
4
4
ns
Glitch Impulse
5
5
5
5
pV-s
Output Rise Time (10% to 90%)2
2.5
2.5
2.5
2.5
ns
Output Fall Time (10% to 90%)2
2.5
2.5
2.5
2.5
ns
AC LINEARITY
Spurious-Free Dynamic Range
to Nyquist
fCLOCK = 10 MSPS; fOUT = 2.1 MHz
84
84
84
70
dBc
fCLOCK = 25 MSPS; fOUT = 2.1 MHz
84
83
84
68
dBc
fCLOCK = 65 MSPS; fOUT = 5.1 MHz
84
84
84
70
dBc
fCLOCK = 65 MSPS; fOUT = 10.1 MHz
83
83
83
71
dBc
fCLOCK = 80 MSPS; fOUT = 1.0 MHz
74
83
72
82
72
82
66
70
dBc
fCLOCK = 125 MSPS; fOUT = 15.1 MHz
78
78
78
68
dBc
fCLOCK = 125 MSPS; fOUT = 25.1 MHz
77
77
76
69
dBc
fCLOCK = 175 MSPS; fOUT = 20.1 MHz
75
75
75
69
dBc
fCLOCK = 175 MSPS; fOUT = 40.1 MHz
72
71
71
67
dBc
Noise Spectral Density
fCLOCK = 175 MSPS; fOUT = 6.0 MHz;
IOUTFS = 2 mA
−149
−146
−137
−127
dBc/
Hz
ENOB at IOUTFS = 2 mA
11.3
10.9
9.5
8.0
bits
fCLOCK = 175 MSPS; fOUT = 6.0 MHz;
IOUTFS = 5 mA
−157
dBc/
Hz
ENOB at IOUTFS = 5 mA
12.5
bits
fCLOCK = 175 MSPS; fOUT = 6.0 MHz;
IOUTFS = 1 mA
−145
dBc/
Hz
ENOB at IOUTFS = 1 mA
10.6
bits
1 See Figure 71 for diagram.
2 Measured single-ended into 500 Ω load.




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