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TPS73025DBVT Datasheet(PDF) 3 Page - Texas Instruments |
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TPS73025DBVT Datasheet(HTML) 3 Page - Texas Instruments |
3 / 16 page www.ti.com DISSIPATION RATINGS TABLE ELECTRICAL CHARACTERISTICS TPS730xx SBVS054G – NOVEMBER 2004 – REVISED DECEMBER 2006 TA ≤ +25°C TA = +70°C TA = +85°C DERATING FACTOR POWER POWER POWER BOARD PACKAGE RθJC RθJA ABOVE TA = +25°C RATING RATING RATING Low-K(1) DBV 65 °C/W 255 °C/W 3.9mW/ °C 390mW 215mW 155mW High-K(2) DBV 65 °C/W 180 °C/W 5.6mW/ °C 560mW 310mW 225mW Low-K(1) YZQ 27 °C/W 255 °C/W 3.9mW/ °C 390mW 215mW 155mW High-K(2) YZQ 27 °C/W 190 °C/W 5.3mW/ °C 530mW 296mW 216mW (1) The JEDEC low-K (1s) board design used to derive this data was a 3-inch × 3-inch, two layer board with 2 ounce copper traces on top of the board. (2) The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch × 3-inch, multilayer board with 1 ounce internal power and ground planes and 2 ounce copper traces on top and bottom of the board. over recommended operating temperature range T J = –40 to +125°C, VEN = VIN, VIN = VOUT(nom) + 1 V (1), I OUT = 1mA, C OUT = 10µF, CNR = 0.01µF (unless otherwise noted). Typical values are at +25°C. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIN Input voltage(1) 2.7 5.5 V IOUT Continuous output current 0 200 mA VFB Internal reference (TPS73001) 1.201 1.225 1.250 V 5.5 – Output voltage range (TPS73001) VFB V VDO Output voltage accuracy 0 µA ≤ I OUT ≤ 200mA, 2.75V ≤ V IN < 5.5V –2% VOUT(nom) +2% V Line regulation ( ∆V OUT%/∆VIN) (1) VOUT + 1V ≤ VIN ≤ 5.5V 0.05 %/V Load regulation ( ∆V OUT%/∆IOUT) 0 µA ≤ I OUT ≤ 200mA, TJ = +25°C 5 mV Dropout voltage(2)(VIN = VOUT(nom) – 0.1V) IOUT = 200mA 120 210 mV Output current limit VOUT = 0V 285 600 mA GND pin current 0 µA ≤ I OUT ≤ 200mA 170 250 µA Shutdown current(3) VEN = 0V, 2.7V ≤ VIN ≤ 5.5V 0.07 1 µA FB pin current VFB = 1.8V 1 µA Power-supply ripple rejection TPS73028 f = 100kHz, TJ = +25°C, IOUT = 200mA 68 dB BW = 200Hz to 100kHz, Output noise voltage (TPS73018) CNR = 0.01µF 33 µV RMS IOUT = 200mA Time, start-up (TPS73018) RL = 14Ω, COUT = 1µF CNR = 0.001µF 50 µs High level enable input voltage 2.7V ≤ V IN ≤ 5.5V 1.7 VIN V Low level enable input voltage 2.7V ≤ V IN ≤ 5.5V 0 0.7 V EN pin current VEN = 0 –1 1 µA UVLO threshold VCC rising 2.25 2.65 V UVLO hysteresis 100 mV (1) Minimum VIN is 2.7V or VOUT + VDO, whichever is greater. (2) Dropout is not measured for the TPS73018 and TPS73025 since minimum VIN = 2.7V. (3) For adjustable versions, this applies only after VIN is applied; then VEN transitions high to low. 3 Submit Documentation Feedback |
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