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CS43L21 Datasheet(PDF) 10 Page - Cirrus Logic |
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CS43L21 Datasheet(HTML) 10 Page - Cirrus Logic |
10 / 63 page 10 DS723A1 CS43L21 +1.8V or +2.5V 1 µF VQ FILT+ 0.1 µF 1 µF DGND VL 0.1 µF +1.8V, 2.5 V or +3.3V I²S/LJ MCLKDIV2 RESET LRCK AGND DEM MCLK SCLK 0.1 µF VA_HP VD SDIN CS43L21 1 µF +1.8V or +2.5V AOUTB AOUTA 470 Ω 470 Ω C C Rext Rext See Note 2 For best response to Fs/2 : () 470 4 470 × + = ext ext R Fs R C π This circuitry is intended for applications where the CS 43L21 connects directly to an unbalanced output of the device . For internal routing applications please see the DAC Analog Output Characteristics section for loading limitations . Note 2 : Digital Audio Processor 0.1 µF VA Headphone Out Left & Right Line Level Out Left & Right Speaker Driver FLYP FLYN VSS_HP GND_HP 51.1 Ω 0.022 µF 1 µF See Note 1 Note 1: Series resistance in the path of the power supplies (typically used for added filtering) must be avoided. Any voltage drop on VA_HP will directly impact the negative charge pump supply (VSS_HP) and result in clipping on the audio output . 1 µF 1 µF ** ** * *Use low ESR ceramic capacitors. See Note 3 Note 3: Pull-up to VL (47 k Ω for Master Mode. Pull- down to DGND for Slave Mode. 47 k Ω TSTO/M/S VL or DGND k Ω Figure 2. Typical Connection Diagram (Hardware Mode) |
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Similar Description - CS43L21 |
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