MC74HC299

MOTOROLA

High–Speed CMOS Logic Data

DL129 — Rev 6

3–2

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

VCC

DC Supply Voltage (Referenced to GND)

– 0.5 to + 7.0

V

Vin

DC Input Voltage (Referenced to GND)

– 1.5 to VCC + 1.5

V

Vout

DC Output Voltage (Referenced to GND)

– 0.5 to VCC + 0.5

V

Iin

DC Input Current, per Pin

± 20

mA

Iout

DC Output Current, per Pin

± 35

mA

ICC

DC Supply Current, VCC and GND Pins

± 75

mA

PD

Power Dissipation in Still Air

Plastic DIP†

SOIC Package†

750

500

mW

Tstg

Storage Temperature

– 65 to + 150

_C

TL

Lead Temperature, 1 mm from Case for 10 Seconds

(Plastic DIP or SOIC Package)

260

_C

* Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

†Derating — Plastic DIP: – 10 mW/

_C from 65_ to 125_C

SOIC Package: – 7 mW/

_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

Max

Unit

VCC

DC Supply Voltage (Referenced to GND)

2.0

6.0

V

Vin, Vout

DC Input Voltage, Output Voltage (Referenced to GND)

0

VCC

V

TA

Operating Temperature, All Package Types

– 55

+ 125

_C

tr, tf

Input Rise and Fall Time

VCC = 2.0 V

(Figure 1)

VCC = 4.5 V

VCC = 6.0 V

0

0

0

1000

500

400

ns

Symbol

Parameter

Test Conditions

VCC

V

Guaranteed Limit

Unit

Symbol

Parameter

Test Conditions

VCC

V

– 55 to

25

_C

v 85_C

v 125_C

Unit

VIH

Minimum High–Level Input

Voltage

Vout = 0.1 V or VCC – 0.1 V

|Iout| v 20 µA

2.0

4.5

6.0

1.5

3.15

4.2

1.5

3.15

4.2

1.5

3.15

4.2

V

VIL

Maximum Low–Level Input

Voltage

Vout = 0.1 V or VCC – 0.1 V

|Iout| v 20 µA

2.0

4.5

6.0

0.3

0.9

1.2

0.3

0.9

1.2

0.3

0.9

1.2

V

VOH

Minimum High–Level Output

Voltage

Vin = VIH or VIL

|Iout| v 20 µA

2.0

4.5

6.0

1.9

4.4

5.9

1.9

4.4

5.9

1.9

4.4

5.9

V

Vin = VIH or VIL |Iout| v 6.0 mA (P/Q)

|Iout| v 7.8 mA (P/Q)

4.5

6.0

3.98

5.48

3.84

5.34

3.70

5.20

Vin = VIH or VIL |Iout| v 4.0 mA (Q′)

|Iout| v 5.2 mA (Q′)

4.5

6.0

3.98

5.48

3.84

5.34

3.70

5.20

VOL

Maximum Low–Level Output

Voltage

Vin = VIH or VIL

|Iout| v 20 µA

2.0

4.5

6.0

0.1

0.1

0.1

0.1

0.1

0.1

0.1

0.1

0.1

V

Vin = VIH or VIL |Iout| v 6.0 mA (P/Q)

|Iout| v 7.8 mA (P/Q)

4.5

6.0

0.26

0.26

0.33

0.33

0.40

0.40

Vin = VIH or VIL |Iout| v 4.0 mA (Q′)

|Iout| v 5.2 mA (Q′)

4.5

6.0

0.26

0.26

0.33

0.33

0.40

0.40

Iin

Maximum Input Leakage Current

Vin = VCC or GND

6.0

± 0.1

± 1.0

± 1.0

µA

IOZ

Maximum Three–State Leakage

Current (QA thru QH)

Output in High–Impedance State

Vin = VIL or VIH

Vout = VCC or GND

6.0

± 0.5

± 5.0

± 10

µA

ICC

Maximum Quiescent Supply

Current (per Package)

Vin = VCC or GND

Iout = 0 µA

6.0

8

80

160

µA

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

This device contains protection

circuitry to guard against damage

due to high static voltages or electric

fields. However, precautions must

be taken to avoid applications of any

voltage higher than maximum rated

voltages to this high–impedance cir-

cuit. For proper operation, Vin and

Vout should be constrained to the

range GND

v (Vin or Vout) v VCC.

Unused inputs must always be

tied to an appropriate logic voltage

level (e.g., either GND or VCC).

Unused outputs must be left open.

I/O pins must be connected to a

properly terminated line or bus.