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CD54AC109 Datasheet(PDF) 4 Page - Texas Instruments

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Part No. CD54AC109
Description  Dual j-k Flip-Flop with Set and Reset
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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CD54AC109, CD74AC109
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SCHS326 – JANUARY 2003
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25°C
–55
°C to
125
°C
–40
°C to
85
°C
UNIT
CC
MIN
MAX
MIN
MAX
MIN
MAX
1.5 V
1.4
1.4
1.4
IOH = –50 µA
3 V
2.9
2.9
2.9
4.5 V
4.4
4.4
4.4
VOH
VI = VIH or VIL
IOH = –4 mA
3 V
2.58
2.4
2.48
V
IOH = –24 mA
4.5 V
3.94
3.7
3.8
IOH = –50 mA†
5.5 V
3.85
IOH = –75 mA†
5.5 V
3.85
1.5 V
0.1
0.1
0.1
IOL = 50 µA
3 V
0.1
0.1
0.1
4.5 V
0.1
0.1
0.1
VOL
VI = VIH or VIL
IOL = 12 mA
3 V
0.36
0.5
0.44
V
IOL = 24 mA
4.5 V
0.36
0.5
0.44
IOL = 50 mA†
5.5 V
1.65
IOL = 75 mA†
5.5 V
1.65
II
VI = VCC or GND
5.5 V
±0.1
±1
±1
µA
ICC
VI = VCC or GND,
IO = 0
5.5 V
4
80
40
µA
Ci
10
10
10
pF
† Test one output at a time, not exceeding 1-second duration. Measurement is made by forcing indicated current and measuring voltage to minimize
power dissipation. Test verifies a minimum 50-
Ω transmission-line drive capability at 85°C and 75-Ω transmission-line drive capability at 125°C.
timing requirements over recommended operating free-air temperature range, VCC = 1.5 V (unless
otherwise noted)
–55
°C to
125
°C
–40
°C to
85
°C
UNIT
MIN
MAX
MIN
MAX
fclock
Clock frequency
8
9
MHz
t
Pulse duration
CLK high or low
63
55
ns
tw
Pulse duration
CLR or PRE low
56
49
ns
tsu
Setup time, before CLK
J or K
69
61
ns
th
Hold time, after CLK
J or K
0
0
ns
trec
Recovery time, before CLK
CLR
↑ or PRE↑
31
27
ns




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