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HD6432631F25 Datasheet(PDF) 11 Page - Renesas Technology Corp |
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HD6432631F25 Datasheet(HTML) 11 Page - Renesas Technology Corp |
11 / 1453 page 3 Section Page Item Description 4.4 Interrupts 117 Note * added Figure 4-4 Interrupt Sources and Number of Interrupts Note *3 added 5.1.1 Features 121 • DTC and DMAC control Note * added 5.2.2 Interrupt Priority Registers A to L, O (IPRA to IPRL, IPRO) 125 Table 5-3 Correspondence between Interrupt Sources and IPR Settings 5.2.5 IRQ Status Register (ISR) 128 Bits 7 to 0—IRQ7 to IRQ0 flags (IRQ7F to IRQ0F) Note * added (n = 5 to 0) amended to (n = 7 to 0) 5.3.1 External Interrupts 129 IRQ7 to IRQ0 Interrupts IRQ5 to IRQ0 amended to IRQ7 to IRQ0 5.3.2 Internal Interrupts 130 Notes *1 and *2 added 5.3.3 Interrupt Exception Handling Vector Table 131 to 134 Table 5-4(a) Interrupt Sources, Vector Addresses, and Interrupt Priorities (H8S/2633, H8S/2632, H8S/2631, H8S/2633R) H8S/2633R added Amend as follows: Interrupt Source column: "CMI" → "Reserved" Origin of Interrupt Source column: "Refresh timer" → " " 135 to 138 Table 5-4(b) Interrupt Sources, Vector Addresses, and Interrupt Priorities (H8S/2695) Newly added 5.6 DTC and DMAC Activation by Interrupt (DMAC and DTC functions are not available in the H8S/2695) 150 Title amended 5.6.2 Block Diagram 151 Figure 5-9 Interrupt Control for DTC and DMAC Note * added 5.6.3 Operation (DMAC and DTC 152 Table 5-11 Interrupt Source Selection and Clearing Control Note *1 added functions are not available in the H8S/2695) (4) Notes on Use Note * added |
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