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BQ24750RHDT Datasheet(PDF) 10 Page - Texas Instruments |
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BQ24750RHDT Datasheet(HTML) 10 Page - Texas Instruments |
10 / 35 page www.ti.com bq24750 SLUS735 – DECEMBER 2006 ELECTRICAL CHARACTERISTICS (continued) 7.0 V ≤ V PVCC≤ 24 V, 0°C < TJ < +125°C, typical values are at TA = 25°C, with respect to AGND (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PWM OSCILLATOR FSW PWM switching frequency 240 360 kHz VRAMP_HEIGHT PWM ramp height As percentage of PVCC 6.6 %PVCC QUIESCENT CURRENT IOFF_STATE Total off-state battery current from VBAT = 16.8 V, VACDET < 0.6 V, 7 10 SRP, SRN, BAT, VCC, BTST, PH, VPVCC > 5 V, TJ = 0 to 85°C µA etc. IBAT_ON Battery on-state quiescent current VBAT = 16.8 V, 0.6V < VACDET < 2.4 V, 1 mA VPVCC > 5V IBAT_LOAD_CD Internal battery load current, charge Charge is disabled: 3 5 mA disbled VBAT = 16.8 V, VACDET > 2.4 V, VPVCC > 5 V IBAT_LOAD_CE Internal battery load current, charge Charge is enabled: 6 10 12 mA enabled VBAT = 16.8 V, VACDET > 2.4 V, VPVCC > 5 V IAC Adapter quiescent current VPVCC = 20 V, charge disabled 2.8 4 mA IAC_SWITCH Adapter switching quiescent current VPVCC = 20 V, charge enabled, converter 25 mA running, total gate charge = 2 × 10 nC INTERNAL SOFT START (8 steps to regulation current) Soft start steps 8 step Soft start step time 1.7 ms CHARGER SECTION POWER-UP SEQUENCING Charge-enable delay after power-up Delay from when adapter is detected to 518 700 908 ms when the charger is allowed to turn on LOGIC INPUT PIN CHARACTERISTICS (CHGEN) VIN_LO Input low threshold voltage 0.8 V VIN_HI Input high threshold voltage 2.1 IBIAS Input bias current VCHGEN = 0 to VREGN 1 µA LOGIC INPUT PIN CHARACTERISTICS (CELLS) VIN_LO Input low threshold voltage, 3 cells CELLS voltage falling edge 0.5 VIN_MID Input mid threshold voltage, 2 cells CELLS voltage rising for MIN, 0.8 1.8 V CELLS voltage falling for MAX VIN_HI Input high threshold voltage, 4 cells CELLS voltage rising 2.5 IBIAS_FLOAT Input bias float current for 2-cell VCHGEN = 0 to VREGN –1 1 µA selection OPEN-DRAIN LOGIC OUTPUT PIN CHARACTERISTICS (ACGOOD) VOUT_LO Output low saturation voltage Sink Current = 4 mA 0.5 V Delay, ACGOOD falling 518 700 908 ms Delay, ACGOOD rising 10 µs OPEN-DRAIN LOGIC OUTPUT PIN CHARACTERISTICS (DPMDET) VOUT_LO Output low saturation voltage Sink Current = 5 mA 0.5 V Delay, DPMDET rising/falling 10 ms 10 Submit Documentation Feedback |
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