TLK4120

QUAD 0.5 to 1.3 Gbps TRANSCEIVER

SLLS599C − DECEMBER 2003 − REVISED JULY 2006

1

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Serializer/Deserializer

Operation

Output

Optical Converters

Initialization

Applications

From Low-Speed Reference

200 mV Min

Interconnect and Point-to-Point Data Link

PBGA Package

description

The TLK4120 is a four channel, multi-gigabit transceiver used in high-speed bidirectional point-to-point data

transmission systems. The TLK4120 supports an effective serial interface speed of 0.5 Gbps to 1.3 Gbps per

channel, providing up to 1.17 Gbps of data bandwidth per channel.

The primary application of the TLK4120 is to provide high-speed I/O data channels for point-to-point baseband

data transmission over controlled impedance media of approximately 50

Ω. The transmission media can be a

printed-circuit board, copper cables, or fiber-optic cable. The maximum rate and distance of data transfer is

dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

The TLK4120 can also be used to replace parallel data transmission architectures by providing a reduction in

the number of traces, connector pins, and transmit/receive pins. Parallel data loaded into the transmitter is

delivered to the receiver over a serial channel, which can be a coaxial copper cable, a controlled impedance

backplane, or an optical link. The data is then reconstructed into its original parallel format. It offers significant

power and cost savings over current solutions, as well as scalability for higher data rate in the future.

The TLK4120 performs the data parallel-to-serial, serial-to-parallel conversion, and clock extraction functions

for a physical layer interface device. The serial transceiver interface operates at a maximum speed of 1.3 Gbps.

The transmitter latches 18-bit parallel data at a rate based on the supplied reference clock (GTx_CLK). The

18-bit parallel data is internally encoded into 20 bits by framing the 18-bit data with a start and a stop bit. The

resulting 20-bit frame is then transmitted differentially at 20 times the reference clock (GTx_CLK) rate. The

receiver section performs the serial-to-parallel conversion on the input data, synchronizing the resulting 20-bit

wide parallel data to the recovered clock (Rx_CLK). It then extracts the 18 bits of data from the 20-bit wide data

resulting in 18 bits of parallel data at the receive data terminals (RDx[0:17]). This results in an effective data

payload of 0.45 Gbps to 1.17 Gbps (18 bits data x GTx_CLK frequency).

The TLK4120 is designed to be hot plug capable. An on-chip power-on reset circuit holds the Rx_CLK low and

places the parallel side output signal terminals, DOUTTxP and DOUTTxN, into a high-impedance state during

power up.

The TLK4120 uses a 2.5-V supply. The I/O section is 3-V compatible. With the 2.5-V supply, the TLK4120 is

power efficient, consuming less than 1150 mW typically. The TLK4120 is characterized for operation from −40

°C

to 85

°C.

Copyright

 2004, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments.