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MC14XXXBD Datasheet(PDF) 3 Page - Motorola, Inc

Part # MC14XXXBD
Description  18-BIT STATIC SHIFT REGISTER
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Manufacturer  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MC14XXXBD Datasheet(HTML) 3 Page - Motorola, Inc

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MOTOROLA CMOS LOGIC DATA
27
MC14006B
SWITCHING CHARACTERISTICS* (CL = 50 pF, TA = 25_C)
Characteristic
Symbol
VDD
Min
Typ #
Max
Unit
Output Rise and Fall Time
tTLH, tTHL = (1.5 ns/pF) CL + 25 ns
tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns
tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns
tTLH,
tTHL
5.0
10
15
100
50
40
200
100
80
ns
Propagation Delay Time
tPLH, tPHL = (1.7 ns/pF) CL + 220 ns
tPLH, tPHL = (0.66 ns/pF) CL + 77 ns
tPLH, tPHL = (0.5 ns/pF) CL + 55 ns
tPLH
tPHL
5.0
10
15
300
110
80
600
220
160
ns
Clock Pulse Width
tWH
5.0
10
15
200
120
80
100
60
40
ns
Clock Pulse Frequency
fcl
5.0
10
15
5.0
8.3
12
2.5
4.2
6.0
MHz
Clock Pulse Rise and Fall Time**
tTLH
tTHL
5.0
10
15
15
5
4
µs
Setup Time
tsu
5.0
10
15
0
0
0
– 50
– 15
– 8.0
ns
Hold Time
th
5.0
10
15
180
90
75
75
25
20
ns
* The formulas given are for the typical characteristics only at 25
_C.
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
** When shift register sections are cascaded, the maximum rise and fall times of the clock input should be equal to or less than the rise and fall times
** of the data outputs driving data inputs, plus the propagation delay of the output driving stage for the output capacitance load.
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However,
precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance
circuit. For proper operation, Vin and Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must
be left open.
Figure 1. Typical Output Source Current
Characteristics Test Circuit
Figure 2. Typical Output Sink Current
Characteristics Test Circuit
VDD = – VGS
Vout
14
IOH
EXTERNAL
POWER
SUPPLY
7
VSS
CLOCK Q4
DP1
Q8
DP5
Q9
DP10
DP14
Q13
Q17
Q18
VDD = VGS
Vout
14
IOL
EXTERNAL
POWER
SUPPLY
VSS
CLOCK Q4
DP1
Q8
DP5
Q9
DP10
DP14
Q13
Q17
Q18


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