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IDT74ALVCH374 Datasheet(HTML) 4 Page - Integrated Device Technology

Part No. IDT74ALVCH374
Description  3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT74ALVCH374 Datasheet(HTML) 4 Page - Integrated Device Technology

  IDT74ALVCH374 Datasheet HTML 4Page - Integrated Device Technology  
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4
EXTENDED COMMERCIAL TEMPERATURE RANGE
IDT74ALVCH374
3.3VCMOSOCTALPOSITIVEEDGE-TRIGGEREDD-TYPE
NOTES:
1. See test circuits and waveforms. TA = – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
OPERATING CHARACTERISTICS, TA = 25oC
SWITCHING CHARACTERISTICS(1)
OUTPUT DRIVE CHARACTERISTICS
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the
appropriate VCC range. TA = – 40°C to + 85°C.
Symbol
Parameter
Test Conditions(1)
Min.
Max.
Unit
VOH
Output HIGH Voltage
VCC = 2.3V to 3.6V
IOH = – 0.1mA
VCC – 0.2
V
VCC = 2.3V
IOH = – 6mA
2
VCC = 2.3V
IOH = – 12mA
1.7
VCC = 2.7V
2.2
VCC = 3.0V
2.4
VCC = 3.0V
IOH = – 24mA
2
VOL
Output LOW Voltage
VCC = 2.3V to 3.6V
IOL = 0.1mA
0.2
V
VCC = 2.3V
IOL = 6mA
0.4
IOL = 12mA
0.7
VCC = 2.7V
IOL = 12mA
0.4
VCC = 3.0V
IOL = 24mA
0.55
ALVC Link
VCC = 2.5V ± 0.2V
VCC = 3.3V ± 0.3V
Symbol
Parameter
Test Conditions
Typical
Typical
Unit
CPD
Power Dissipation Capacitance
Outputs enabled
CL = 0pF, f = 10Mhz
pF
CPD
Power Dissipation Capacitance
Outputs disabled
pF
VCC = 2.5V ± 0.2V
VCC = 2.7V
VCC = 3.3V ± 0.3V
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
tPLH
tPHL
Propagation Delay
CLK to xQ
8
7
2.2
6
ns
tPZH
tPZL
Output Enable Time
OE to xQ
8.5
7.5
1.5
6.5
ns
tPHZ
tPLZ
Output Disable Time
OE to xQ
9.5
6.5
1.5
5.5
ns
tW
Pulse Duration, CLK HIGH or LOW
3.3
3.3
3.3
ns
tSU
Setup Time, data before CLK
2
2—2—
ns
tH
Hold Time, data after CLK
1.5
1.5
1.5
ns
tSK(o)
Output Skew(2)
500
ps


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