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LMX2486 Datasheet(PDF) 2 Page - National Semiconductor (TI) |
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LMX2486 Datasheet(HTML) 2 Page - National Semiconductor (TI) |
2 / 37 page Connection Diagram Top View 24-Pin LLP (SQ) 20156922 Pin Descriptions Pin # Pin Name I/O Pin Description 0 GND - Ground Substrate. This is on the bottom of the package and must be grounded. 1 CPoutRF O RF PLL charge pump output. 2 GND - RF PLL analog ground. 3 VddRF1 - RF PLL analog power supply. 4 FinRF I RF PLL high frequency input pin. 5 FinRF* I RF PLL complementary high frequency input pin. Shunt to ground with a 100 pF capacitor. 6 LE I MICROWIRE Load Enable. High impedance CMOS input. Data stored in the shift registers is loaded into the internal latches when LE goes HIGH 7 DATA I MICROWIRE Data. High impedance binary serial data input. 8 CLK I MICROWIRE Clock. High impedance CMOS Clock input. Data for the various counters is clocked into the 24 bit shift register on the rising edge 9 VddRF2 - Power supply for RF PLL digital circuitry. 10 CE I Chip Enable control pin. Must be pulled high for normal operation. 11 VddRF5 I Power supply for RF PLL digital circuitry. 12 Ftest/LD O Test frequency output / Lock Detect. 13 FinIF I IF PLL high frequency input pin. 14 VddIF1 - IF PLL analog power supply. 15 GND - IF PLL digital ground. 16 CPoutIF O IF PLL charge pump output 17 VddIF2 - IF PLL power supply. 18 OSCout O Buffered output of the OSCin signal. 19 ENOSC I Oscillator enable. When this is set to high, the OSCout pin is enabled regardless of the state of other pins or register bits. 20 OSCin I Reference Input. 21 NC I This pin must be left open. 22 VddRF3 - Power supply for RF PLL digital circuitry. 23 FLoutRF O RF PLL Fastlock Output. Also functions as Programmable TRI-STATE CMOS output. 24 VddRF4 - RF PLL analog power supply. www.national.com 2 |
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