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SC2453ITSTR Datasheet(PDF) 8 Page - Semtech Corporation |
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SC2453ITSTR Datasheet(HTML) 8 Page - Semtech Corporation |
8 / 14 page 8 2002 Semtech Corp. www.semtech.com SC2453 POWER MANAGEMENT PRELIMINARY Applications Information The SC2453 is designed to control and drive two N-Chan- nel MOSFET synchronous rectified buck and two LDOs, one positive and the other negative. The two bucks are synchronized and out of phase operation for low input ripple and noise. The switching frequency is program- mable to optimize design. The SC2453 switching regula- tor section features lossless current sensing while it pro- vides a programmable cycle by cycle over current limit. The SC2453 linear sections are low dropout regulators. The voltage for the linear controllers LDO1 and LDO2 are programmable. SUPPLIES Supplies VIN, PVCC and AVCC from the input source are used to power the SC2353. An external PNP transistor as a linear regulator supplies AVCC and PVCC. The VIN supply provides the bias for the Internal Reference and UVLO circuitry. The AVCC supply provides the bias for the oscillator, the switchers, the LDO controllers, and the Power Good circuitry. PVCC is used to drive the low side MOSFET gate. START UP SEQUENCE A 5uA current source pulls up on the SS pin. When the SS pin reaches 0.5V, the first converter will start. The reference input of the error amplifier is ramped up with the soft-start signal. When the SS pin reaches 2V the SS pin is pulled down to approximately 0.7V and the second converter will begin to soft-start in an identical fashion to the first converter. When the SS pin reaches 2V for the second time, the SS pin is pulled to approximately 0.7V again and the LDOs are started. The reference of the positive LDO is ramped with the SS pin while the negative LDO should be soft-started externally by ramping the positive supply of the feedback resistors. The SS pin will then be pulled up to supply, i.e. AVCC. The SS time is controlled by the value of the SS cap. If the SS pin is pulled below 0.5V, the SC2453 is disabled. The power-okay circuitry monitors the FB inputs of the converter error amplifiers. If the voltage on these inputs goes above 0.55V or below 0.45V then the POK pin is pulled low. The power-okay circuitry monitors the FB in- puts of the converter error amplifiers. If the voltage on these inputs goes above 0.55V or below 0.45V then the POK pin is pulled low. The POK pin is held low until the end of the start-up sequence. OSCILLATOR The switching frequency of the SC2453 is set by an ex- ternal resistor using the following formula: fs 4 . 8 p 10 1 R freq • • = OVER CURRENT SC2453 monitors any voltage drop in the lower MOSFETs Rdson voltage due to an over current condition. This method of current sensing minimizes any unnecessary losses due to external sense resistance. The SC2453 utilizes an internal current source and an external resistor connected from the ILIM pins to the AGND pin to program a current limit level. This limit is programmable by choosing the resistor relative to the level required. The value of the resistor can be selected by the following formula: ) Rdson * IIim /( 2000 lim Ri = An internal comparator with a reference from the level set by the external resistor monitors the voltage drop across the lower MOSFET. Once the Vdson of the MOSFET exceeds this level, the low side gate is turned on and the upper MOSFET is turned off. GATE DRIVERS The low side gate driver is supplied from PVCC and pro- vides a peak source/sink current of 1A. The high side gate drive is also capable of sourcing and sinking peak currents of 1A. The high side MOSFET gate drive can be provided by an external 12V supply that is connected from BST to GND. The actual gate to source voltage of the upper MOSFET will approximately equal 7V (12V-VCC). If the external 12V supply is not available, a classical bootstrap technique can be implemented from the PVCC supply. A bootstrap capacitor is connected from BST to Phase while PVCC is connected through a diode (Schottky or other fast low VF diode) to the BST. This will provide a gate to source voltage approximately equal to the VCC- Vdiode drop. Shoot through control circuitry provides a 30ns dead time to ensure both the upper and lower MOSFET will not turn on simultaneously and cause a shoot through condition. |
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