LC4256V-75F256AC datasheet(39/74 Pages) LATTICE

Part #	LC4256V-75F256AC

Description	3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs

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Manufacturer	LATTICE [Lattice Semiconductor]

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Lattice Semiconductor

ispMACH 4000V/B/C/Z Family Data Sheet

39

ispMACH 4000V/B/C/Z Power Supply and NC Connections

1

Signal

44

TQFP

4

48

TQFP

4

56

csBGA

7

100

TQFP

4

128

TQFP

4

144

TQFP

4

176

TQFP

4

256

fpBGA

2, 3, 7

VCC

11, 33

12, 36

K2, A9

25, 40,

75, 90

32, 51,

96, 115

36, 57, 108,

129

42, 69, 88,

130, 157,

176

B2, B15, G8, G9, K8, K9, R2, R15

VCCO0

6

F3

13, 33,

95

3, 17, 30,

41, 122

3, 19, 34,

47, 136

4, 22, 40,

56, 166

D6, F4, H7, J7, L4, N6

VCCO1

28

30

E8

45, 63,

83

58, 67,

81, 94,

105

64, 75, 91,

106, 119

78, 92,

110, 128,

144

D11, F13, H10, J10, L13, N11

GND

12, 34

13, 37

H3, C8

1, 26,

51, 76

1, 33, 65,

97

1, 37, 73,

109

2, 46

5, 65,

90, 134,

153

A1, A16, C6, C11, F3, F14, G7, G10,

H8, H9, J8, J9, K7, K10, L3, L14, P6,

P11, T1, T16

GND

(Bank 0)

55

D3

7, 18,

32, 96

10, 24,

40, 113,

123

10, 18

6, 27,

46, 127, 137

13, 31, 55,

155, 167

GND

(Bank 1)

27

29

G8

46, 57,

68, 82

49, 59,

74, 88,

104

55, 65, 82,

90

6, 99, 118

67, 79,

101, 119,

143

NC

—

4032Z:

A8, B10,

E1, E3,

F8, F10,

J1, K3

——

4128V: 17,

20, 38, 45,

72, 89, 92,

110, 117,

144

4256V: 18,

90

1, 43, 44,

45, 89,

131, 132,

133

4256V/B/C, 128 I/O: A4, A5, A6, A11,

A12, A13, A15, B5, B6, B11, B12, B14,

C7, D1, D4, D5, D10, D12, D16, E1,

E2, E4, E5, E7, E10, E13, E14, E15,

E16, F1, F2, F15, F16, G1, G4, G5,

G6, G12, G13, G14, J11, K3, K4, K15,

L1, L2, L12, L15, L16, M1, M2, M3,

M4, M5, M12, M13, M15, M16, N1, N2,

N7, N10, N12, N14, P5, P12, R4, R5,

R6, R11, R12, R16, T2, T4, T5, T6,

T11, T12, T13, T15

4256V/B/C, 160 I/O: A5, A12, A15, B5,

B6, B11, B12, B14, D4, D5, D12, E1,

E4, E5, E13, E15, E16, F1, F2, F15,

G1, G5, G12, G14, L1, L2, L12, L15,

L16, M1, M2, M3, M12, M16, N1, N12,

N14, P5, R4, R5, R6, R11, R12, R16,

T4, T5, T12, T15

4384V/B/C: B5, B12, D5, D12, E1,

E15, E16, F2, L12, M1, M2, M16, N12,

R5, R12, T4

4512V/B/C: None

1. All grounds must be electrically connected at the board level. However, for the purposes of I/O current loading, grounds are associated with

the bank shown.

2. Internal GNDs and I/O GNDs (Bank 0/1) are connected inside package.

3. VCCO balls connect to two power planes within the package, one for VCCO0 and one for VCCO1.

4. Pin orientation follows the conventional order from pin 1 marking of the top side view and counter-clockwise.

5. ispMACH 4384V/B/C pin 46 is tied to GND (Bank 0).

6. ispMACH 4128V only.

7. Pin orientation A1 starts from the upper left corner of the top side view with alphabetical order ascending vertically and numerical order

ascending horizontally.

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LC4256V-75F256AC Datasheet(PDF) 39 Page - Lattice Semiconductor

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