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IDT74FCT645DT Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT74FCT645DT Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 6 page 2 INDUSTRIALTEMPERATURERANGE IDT74FCT645T/AT/CT/DT FASTCMOSOCTALBIDIRECTIONALTRANSCEIVER SOIC/ SSOP TOP VIEW 2 3 1 16 15 14 11 19 18 20 17 13 12 5 6 7 4 SO20-2 SO20-7 8 9 10 A2 A0 A1 VCC A3 A6 A4 A5 A7 GND OE B2 B0 B1 B3 B6 B4 B5 B7 T/R ABSOLUTE MAXIMUM RATINGS(1) Symbol Rating Max. Unit VTERM(2) Terminal Voltage with Respect to GND –0.5 to +7 V VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –60 to +120 mA 8T-link NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted. 2. Inputs and Vcc terminals only. 3. Outputs and I/O terminals only. CAPACITANCE (TA = +25OC, f = 1.0MHz) Symbol Parameter(1) Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 6 10 pF COUT Output Capacitance VOUT = 0V 8 12 pF 8T-link NOTE: 1. This parameter is measured at characterization but not tested. PIN DESCRIPTION Pin Names Description OE Output Enable Input (Active LOW) T/ R Transmit/Receive Input A0-A7 Side A Inputs or 3-State Outputs B0-B7 Side B Inputs or 3-State Outputs FUNCTION TABLE (1) Inputs OE T/R Outputs L L Bus B Data to Bus A L H Bus A Data to Bus B H X High Z State NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care PIN CONFIGURATION |
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