Dual Full-Bridge PWM Motor Driver

A3969

7

Allegro MicroSystems, Inc.

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

www.allegromicro.com

Load Current Regulation.

Due to internal logic and

blanking time, limit the minimum value the current control

circuitry can regulate. To produce zero current in a wind-

ing, the ENABLE terminal should be held high, turning off

all output drivers for that H-bridge.

Logic Inputs. A logic high on the PHASE input results

A logic low on the PHASE input results in current flowing

spikes that can occur when switching the PHASE input.

A logic high on the ENABLE input turns off all four

output drivers of that H-bridge. This results in a fast cur-

rent decay through the internal ground clamp and flyback

diodes. A logic low on the ENABLE input turns on the

selected source and sink driver of that H-bridge.

The ENABLE inputs can be pulse-width modulated

for applications that require a fast current-decay PWM. If

external current-sensing circuitry is used, the internal cur-

terminal to ground.

The REFERENCE input voltage is typically set with a

nally divided down by 4 to set up the current-comparator

trip-voltage threshold. The reference input voltage range is

0 to 1.7 V.

Output Drivers

. To minimize on-chip power dissipation,

the sink drivers incorporate a Satlington structure. The

saturated transistor and the high peak-current capability

of a Darlington (connected) transistor. A graph showing

typical output saturation voltages as a function of output

current is on the next page.

Miscellaneous Information

. Thermal protection

circuitry turns off all output drivers should the junction

temperature reach +165 °C (typical). This is intended

only to protect the device from failures due to excessive

junction temperatures and should not imply that output

short circuits are permitted. Normal operation is resumed

when the junction temperature has decreased about 15°C.

The A3969 current control employs a fixed-frequency,

variable duty cycle PWM technique. As a result, the cur-

rent-control regulation may become unstable if the duty

cycle exceeds 50%.

To minimize current-sensing inaccuracies caused

should have a separate return to the ground terminal of the

device. For low-value sense resistors, the I x R drops in

the printed-wiring board can be significant and should be

taken into account. The use of sockets should be avoided

as their contact resistance can cause variations in the ef-

pled with an electrolytic capacitor (47 μF recommended)

placed as close to the device as physically practical. To

minimize the effect of system ground I x R drops on

the logic and reference input signals, the system ground

should have a low-resistance return to the load supply

voltage.

The frequency of the clock oscillator will determine

the amount of ripple current. A lower frequency will

result in higher current ripple, but reduced heating in the

motor and driver IC due to a corresponding decrease in

hysteretic core losses and switching losses respectively.

A higher frequency will reduce ripple current, but will

increase switching losses and EMI.

FUNCTIONAL DESCRIPTION

(continued)