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K9F1208U0C-J Datasheet(PDF) 2 Page - Samsung semiconductor |
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K9F1208U0C-J Datasheet(HTML) 2 Page - Samsung semiconductor |
2 / 38 page FLASH MEMORY 2 K9F1208R0C K9F1208U0C K9F1208B0C Document Title 64M x 8 Bits NAND Flash Memory Revision History The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have any questions, please contact the SAMSUNG branch office near you. Revision No. 0.0 0.1 0.2 0.3 0.4 0.5 1.0 Remark Advance Advance Advance Advance Advance Preliminary Final History Initial issue. 2.7V part is added Address of Read 2 is changed (A4~A7 : Don’t care -> Fixed "Low" ) 1. Add tRPS/tRCS/tREAS parameter for status read 2. Add nWP timing guide 1. Change from tRPS/tRCS/tREAS to tRPB/tRCB/tREAB parameter for 1.8V device busy state 1. Sequential Row Read is added 1. tCRY is changed (50ns+tR(R/B) --> 5us) Draft Date Nov. 10th 2005 July 13th 2006 Aug. 1st 2006 Oct. 12th 2006 Nov. 14th 2006 Nov. 15th 2006 Dec. 28th 2006 Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site. http://www.samsung.com/Products/Semiconductor/ |
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