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SN74LVCR162245KR Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LVCR162245KR Datasheet(HTML) 1 Page - Texas Instruments |
1 / 12 page www.ti.com FEATURES DESCRIPTION/ORDERING INFORMATION DGG OR DL PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1DIR 1B1 1B2 GND 1B3 1B4 VCC 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 VCC 2B5 2B6 GND 2B7 2B8 2DIR 1OE 1A1 1A2 GND 1A3 1A4 VCC 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 VCC 2A5 2A6 GND 2A7 2A8 2OE This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the SN74LVCR162245 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES047E – AUGUST 1995 – REVISED MARCH 2005 • Member of the Texas Instruments Widebus™ Family • Operates From 2.7 V to 3.6 V • Inputs Accept Voltages to 5.5 V • Max tpd of 8.5 ns at 3.3 V • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors • All Outputs Have Equivalent 26- Ω Series Resistors, So No External Resistors Are Required • Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17 • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) This 16-bit (dual-octal) noninverting bus transceiver is designed for 2.7-V to 3.6-V VCC operation. The SN74LVCR162245 is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements. A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses effectively are isolated. All outputs, which are designed to sink up to 12 mA, include 26- Ω resistors to reduce overshoot and undershoot. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the input circuit and is not disabled by OE or DIR. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING Tube SN74LVCR162245DL SSOP – DL LVCR162245 Tape and reel SN74LVCR162245DLR –40 °C to 85°C TSSOP – DGG Tape and reel SN74LVCR162245DGGR LVCR162245 VFBGA – GQL SN74LVCR162245KR Tape and reel LEP245 VFBGA – ZQL (Pb-free) 74LVCR162245ZQLR (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 1995–2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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