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TAS5182IDCAR Datasheet(PDF) 5 Page - Texas Instruments

Part # TAS5182IDCAR
Description  100−W STEREO DIGITAL AMPLIFIER POWER STAGE CONTROLLER
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TAS5182IDCAR Datasheet(HTML) 5 Page - Texas Instruments

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TAS5182
SLES045E - JUNE 2002 - REVISED MAY 2004
www.ti.com
5
Terminal Functions (continued)
TERMINAL
DESCRIPTION
I/O
NAME
DESCRIPTION
I/O
NO.
DHS_A
49
I
High-side drain connection, used for high-side VDS sensing
DHS_B
43
I
High-side drain connection, used for high-side VDS sensing
DHS_C
37
I
High-side drain connection, used for high-side VDS sensing
DHS_D
31
I
High-side drain connection, used for high-side VDS sensing
DTC_HS
6
I
High-side dead-time programming, external resistor to DVSS required
DTC_LS
7
I
Low-side dead-time programming, external resistor to DVSS required
DVDD
3
P
Logic supply voltage
DVSS
4, 24
P
Digital ground, reference for input signals
ERR0
21
O
Logic output, signals chip operation mode/state. This output is open drain with internal pullup resistor.
ERR1
22
O
Logic output, signals chip operation mode/state. This output is open drain with internal pullup resistor.
GHS_A
51
O
Gate drive output for high-side MOSFET, half-bridge A
GHS_B
45
O
Gate drive output for high-side MOSFET, half-bridge B
GHS_C
39
O
Gate drive output for high-side MOSFET, half-bridge C
GHS_D
33
O
Gate drive output for high-side MOSFET, half-bridge D
GLS_A
54
O
Gate drive output for low-side MOSFET, half-bridge A
GLS_B
48
O
Gate drive output for low-side MOSFET, half-bridge B
GLS_C
42
O
Gate drive output for low-side MOSFET, half-bridge C
GLS_D
36
O
Gate drive output for low-side MOSFET, half-bridge D
GVDD
30, 55
P
Gate drive voltage supply terminal
GVSS
29, 56
P
Gate drive voltage supply ground return
LOW/HIZ
23
I
Logic signal that determines the drive output state during a reset. When RESET_AB or RESET_CD is low,
LOW/HIZ = 1 indicates that the outputs are low impedance
LOW/HIZ = 0 indicates that the outputs are high impedance
NC
1, 2, 5,
25, 26
Not connected. Terminals 1, 2, 5, 25, and 26 may be connected to DVSS.
OC_HIGH
8
I
High-side overcurrent trip value programming. OC configuration circuit (see Figure 5) is required.
OC_LOW
27
I
Low-side overcurrent trip value programming. OC configuration circuit (see Figure 5) is required.
RESET_AB
12
I
Reset signal half-bridge A and B, active low
RESET_CD
17
I
Reset signal half-bridge C and D, active low
SHUTDOWN
20
O
Error/warning report indicator. This output is open drain with internal pull-up resistor.
SHS_A
52
I
High-side source connection, used as BST floating ground (and high-side VDS sensing)
SHS_B
46
I
High-side source connection, used as BST floating ground (and high-side VDS sensing)
SHS_C
40
I
High-side source connection, used as BST floating ground (and high-side VDS sensing)
SHS_D
34
I
High-side source connection, used as BST floating ground (and high-side VDS sensing)
SLS_A
53
I
Source connection low-side MOSFET, ground return terminal, half-bridge A
SLS_B
47
I
Source connection low-side MOSFET, ground return terminal, half-bridge B
SLS_C
41
I
Source connection low-side MOSFET, ground return terminal, half-bridge C
SLS_D
35
I
Source connection low-side MOSFET, ground return terminal, half-bridge D
TEMP
28
I
External temperature sensing connection
VRFILT
9
I
Bandgap reference = 1.8 V. Capacitor must be connected from VRFILT to DVSS.


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