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SN65HVD251 Datasheet(PDF) 2 Page - Texas Instruments |
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SN65HVD251 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 19 page www.ti.com ABSOLUTE MAXIMUM RATINGS ABSOLUTE MAXIMUM POWER DISSIPATION RATINGS THERMAL CHARACTERISTICS SN65HVD251 SLLS545C – NOVEMBER 2002 – REVISED SEPTEMBER 2005 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. over operating free-air temperature range unless otherwise noted(1)(2) SN65HVD251 Supply voltage range, VCC -0.3 V to 7 V Voltage range at any bus terminal (CANH or CANL) -36 V to 36 V Transient voltage per ISO 7637, pulse 1, 2, 3a, 3b CANH, CANL ±200 V Input voltage range, VI (D, Rs, or R) -0.3 V to VCC + 0.5 Receiver output current, IO –10 mA to 10 mA CANH, CANL and GND 14 kV Human Body Model (3) Electrostatic discharge All pins 6 kV Charged-Device Model (4) All pins 1 kV Continuous total power dissipation (see Dissipation Rating Table) (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal. (3) Tested in accordance with JEDEC Standard 22, Test Method A114-A. (4) Tested in accordance with JEDEC Standard 22, Test Method C101. CIRCUIT BOARD TA = 25°C DERATING FACTOR (1) TA = 85°C POWER TA = 125°C POWER PACKAGE MODEL POWER RATING ABOVE TA = 25°C RATING RATING Low-K(2) 576 mW 4.8 mW/°C 288 mW 96 mW SOIC (D) High-K(3) 924 mW 7.7 mW/°C 462 mW 154 mW Low-K(2) 888 mW 7.4 mW/°C 444 mW 148 mW PDIP (P) High-K(3) 1212 mW 10.1 mW/°C 606 mW 202 mW (1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow. (2) In accordance with the Low-K thermal metric definitions of EIA/JESD51-3. (3) In accordance with the High-K thermal metric definitions of EIA/JESD51-7. PARAMETER TEST CONDITIONS VALUE UNITS MIN TYP MAX D 78.7 Θ JB Junction-to-board thermal resistance °C/W P 48.9 D 44.6 Θ JC Junction-to-case thermal resistance °C/W P 66.6 VCC = 5 V, Tj = 27 °C, RL = 60Ω, 97.7 mW RS at 0 V, Input to D a 500-kHz 50% duty cycle square wave PD Device power dissipation VCC = 5.5 V, Tj = 130°C, RL = 60Ω, 142 mW RS at 0 V, Input to D a 500-kHz 50% duty cycle square wave TSD Thermal shutdown junction temperature 165 °C 2 |
Similar Part No. - SN65HVD251_06 |
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Similar Description - SN65HVD251_06 |
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