74HC74DG datasheet(2/8 Pages) ONSEMI

Part #	74HC74DG

Description	Dual D Flip?묯lop with Set and Reset High?뭁erformance Silicon?묰ate CMOS

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74HC74

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2

RESET 1

DATA 1

CLOCK 1

SET 1

RESET 2

DATA 2

CLOCK 2

SET 2

1

2

3

4

13

12

11

10

5

6

9

8

Q1

Q2

PIN 14 = VCC

PIN 7 = GND

FUNCTION TABLE

Inputs

Outputs

Set Reset Clock Data

Q

LH

X

HL

X

L

H

L

X

H*

HH

H

L

HH

L

H

L

X

No Change

H

X

No Change

H

X

No Change

*Both outputs will remain high as long as Set and Reset are low, but the output

states are unpredictable if Set and Reset go high simultaneously.

LOGIC DIAGRAM

PIN ASSIGNMENT

SET 1

CLOCK 1

DATA 1

RESET 1

11

12

13

14

8

9

10

5

4

3

2

1

7

6

SET 2

CLOCK 2

DATA 2

RESET 2

VCC

Q2

GND

Q1

MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

VCC

DC Supply Voltage (Referenced to GND)

– 0.5 to + 7.0

V

Vin

DC Input Voltage (Referenced to GND)

– 0.5 to VCC + 0.5

V

Vout

DC Output Voltage (Referenced to GND)

– 0.5 to VCC + 0.5

V

Iin

DC Input Current, per Pin

±20

mA

Iout

DC Output Current, per Pin

±25

mA

ICC

DC Supply Current, VCC and GND Pins

±50

mA

PD

Power Dissipation in Still Air,

SOIC Package†

TSSOP Package†

500

450

mW

Tstg

Storage Temperature

– 65 to + 150

_C

TL

Lead Temperature, 1 mm from Case for 10 Seconds

(SOIC or TSSOP Package)

260

300

_C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress

ratings only. Functional operation above the Recommended Operating Conditions is not implied.

Extended exposure to stresses above the Recommended Operating Conditions may affect device

reliability.

†Derating — SOIC Package: – 7 mW/_C from 65_ to 125_C

TSSOP Package: − 6.1 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

Max

Unit

VCC

DC Supply Voltage (Referenced to GND)

2.0

6.0

V

Vin, Vout DC Input Voltage, Output Voltage (Referenced to GND)

0

VCC

V

TA

Operating Temperature, All Package Types

– 55

+ 125

_C

tr, tf

Input Rise and Fall Time

VCC = 2.0 V

(Figures 1, 2, 3)

VCC = 3.0 V

VCC = 4.5 V

VCC = 6.0 V

0

1000

600

500

400

ns

This device contains protection

circuitry to guard against damage

due to high static voltages or electric

fields. However, precautions must

be taken to avoid applications of any

voltage higher than maximum rated

voltages to this high−impedance cir-

cuit. For proper operation, Vin and

Vout should be constrained to the

range GND v (Vin or Vout) v VCC.

Unused inputs must always be

tied to an appropriate logic voltage

level (e.g., either GND or VCC).

Unused outputs must be left open.

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