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NAND04GA3C2AN6E Datasheet(PDF) 7 Page - STMicroelectronics |
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NAND04GA3C2AN6E Datasheet(HTML) 7 Page - STMicroelectronics |
7 / 51 page NAND04GA3C2A, NAND04GW3C2A 1 Summary description 7/51 1 Summary description The NAND04GA3C2A and NAND04GW3C2A are a Multi-level Cell(MLC) devices from the NAND Flash 2112 Byte Page family of non-volatile Flash memories. The devices are offered in 1.8V and 3V VDDQ I/O power supplies. The core voltage is 3V VDD. The size of a Page is 2112 Bytes (2048 + 64 spare). The address lines are multiplexed with the Data Input/Output signals on a multiplexed x8 Input/Output bus. This interface reduces the pin count and makes it possible to migrate to other densities without changing the footprint. Each block can be programmed and erased over 10,000 cycles. The devices also have hardware security features; a Write Protect pin is available to give hardware protection against Program and Erase operations. The devices feature an open-drain Ready/Busy output that can be used to identify if the Program/Erase/Read (P/E/R) Controller is currently active. The use of an open-drain output allows the Ready/Busy pins from several memories to be connected to a single pull-up resistor. Each device has a Cache Read feature which improves the read throughput for large files. During Cache Reading, the device loads the data in a Cache Register while the previous data is transferred to the I/O Buffers to be read. All devices have the Chip Enable Don’t Care feature, which allows code to be directly downloaded by a microcontroller, as Chip Enable transitions during the latency time do not stop the read operation There is the option of a Unique Identifier (serial number), which allows each device to be uniquely identified. It is subject to an NDA (Non Disclosure Agreement) and is therefore not described in the datasheet. For more details of this option contact your nearest ST Sales office. The NAND04GA3C2A and NAND04GW3C2A are available in a TSOP48 (12 x 20mm) package. In order to meet environmental requirements, ST offers the devices in ECOPACK® packages. ECOPACK packages are Lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. For information on how to order these options refer to Table 22: Ordering Information Scheme. Devices are shipped from the factory with Block 0 always valid and the memory content bits, in valid blocks, erased to ’1’. See Table 2: Product Description, for all the devices available in the family. Table 2. Product Description Reference Part Number Density Bus Width Page Size Block Size Memory Array Operating Voltage VDD Operating Voltage VDDQ Timings Package Random Access (max) Sequential Access (min) Page Program (typ) Block Erase (typ) NAND04Gx3C2A NAND04GW3C2A 4Gbits x8 2048+ 64 Bytes 256K+ 8K Bytes 128 Pages x 2048 Blocks 2.7 to 3.6V 2.7V to 3.6V 60µs 60ns 800µs 1.5ms TSOP48 NAND04GA3C2A 2.7 to 3.6V 1.7V to 1.95V |
Similar Part No. - NAND04GA3C2AN6E |
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Similar Description - NAND04GA3C2AN6E |
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