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SN65MLVD047 Datasheet(PDF) 5 Page - Texas Instruments |
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SN65MLVD047 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 17 page www.ti.com SWITCHING CHARACTERISTICS SN65MLVD047 SLLS606A – MARCH 2004 – REVISED JULY 2005 over recommended operating conditions unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT tPLH Propagation delay time, low-to-high-level output 1 1.5 2.4 ns tPHL Propagation delay time, high-to-low-level output 1 1.5 2.4 ns tr Differential output signal rise time 1 1.9 ns tf Differential output signal fall time See Figure 5 1 1.9 ns tsk(o) Output skew 100 ps tsk(p) Pulse skew (|tpHL - tpLH|) 22 100 ps tsk(pp) Part-to-part skew(2) 600 ps tjit(per) Period jitter, rms (1 standard deviation)(3) All inputs 100 MHz clock input 0.2 1 ps tjit(c-c) Cycle-to-cycle jitter(3) All inputs 100 MHz clock input 5 36 ps tjit(pp) Peak-to-peak jitter(3)(4) All inputs 200 Mbps 215-1 PRBS input 46 158 ps tPZH Enable time, high-impedance-to-high-level output 7 ns See Figure 6 tPZL Enable time, high-impedance-to-low-level output 7 ns tPHZ Disable time, high-level-to-high-impedance output 8 ns See Figure 6 tPLZ Disable time, low-level-to-high-impedance output 8 ns (1) All typical values are at 25 °C and with a 3.3-V supply voltage. (2) tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits. (3) Stimulus jitter has been subtracted from the measurements. (4) Peak-to-peak jitter includes jitter due to pulse skew (tsk(p)). 5 |
Similar Part No. - SN65MLVD047_06 |
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Similar Description - SN65MLVD047_06 |
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