© Semiconductor Components Industries, LLC, 2007

January, 2007 − Rev. 10

1

Publication Order Number:

MC74HCT245A/D

MC74HCT245A

Octal 3−State Noninverting

Bus Transceiver with LSTTL

Compatible Inputs

High−Performance Silicon−Gate CMOS

The MC74HCT245A is identical in pinout to the LS245. This

device may be used as a level converter for interfacing TTL or NMOS

outputs to High Speed CMOS inputs.

The MC74HCT245A is a 3−state noninverting transceiver that is

used for 2−way asynchronous communication between data buses.

The device has an active−low Output Enable pin, which is used to

place the I/O ports into high−impedance states. The Direction control

determines whether data flows from A to B or from B to A.

Features

No. 7A

Figure 1. Logic Diagram

A

DATA

PORT

A8

A7

A6

A5

A3

A4

A2

A1

9

8

7

6

5

4

3

2

DIRECTION

OUTPUT ENABLE

1

19

PIN 10 = GND

18

17

16

15

14

13

12

11

B1

B2

B3

B4

B5

B6

B7

B8

B

DATA

PORT

Design Criteria

Value

Units

Internal Gate Count*

76

ea

Internal Gate Propagation Delay

1.0

ns

Internal Gate Power Dissipation

5.0

mW

Speed Power Product

0.005

pJ

*Equivalent to a two−input NAND gate.

FUNCTION TABLE

Control Inputs

Operation

Output Enable

Direction

L

L

Data Transmitted from Bus B to Bus A

L

H

Data Transmitted from Bus A to Bus B

H

X

Buses Isolated (High−Impedance State)

X = Don’t Care

PIN ASSIGNMENT

A5

A3

A2

A1

DIRECTION

GND

A8

A7

A6

A4

5

4

3

2

1

10

9

8

7

6

14

15

16

17

18

19

20

11

12

13

B3

B2

B1

OUTPUT ENABLE

B8

B7

B6

B5

B4

http://onsemi.com

See detailed ordering, shipping information, and marking

information in the package dimensions section on page 6 of

this data sheet.

ORDERING INFORMATION

SOIC−20W

DW SUFFIX

CASE 751D

TSSOP−20

DT SUFFIX

CASE 948E

SOEIAJ−20

F SUFFIX

CASE 967

1

1

1

PDIP−20

N SUFFIX

CASE 738

1