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MC74HCT244ADTR2G Datasheet(PDF) 1 Page - ON Semiconductor |
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MC74HCT244ADTR2G Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 8 page © Semiconductor Components Industries, LLC, 2006 December, 2006 − Rev. 11 1 Publication Order Number: MC74HCT244A/D MC74HCT244A Octal 3−State Noninverting Buffer/Line Driver/ Line Receiver with LSTTL−Compatible Inputs High−Performance Silicon−Gate CMOS The MC74HCT244A is identical in pinout to the LS244. This device may be used as a level converter for interfacing TTL or NMOS outputs to High−Speed CMOS inputs. The HCT244A is an octal noninverting buffer line driver line receiver designed to be used with 3−state memory address drivers, clock drivers, and other bus−oriented systems. The device has non−inverted outputs and two active−low output enables. The HCT244A is the non−inverting version of the HCT240. See also HCT241. Features • Output Drive Capability: 15 LSTTL Loads • TTL NMOS−Compatible Input Levels • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 4.5 to 5.5 V • Low Input Current: 1 mA • In Compliance with the Requirements Defined by JEDEC Standard No. 7A • Chip Complexity: 112 FETs or 28 Equivalent Gates • Pb−Free Packages are Available Figure 1. Logic Diagram DATA INPUTS A1 A2 A3 A4 B1 B2 B3 B4 17 15 13 11 8 6 4 218 16 14 12 9 7 5 3 YB4 YB3 YB2 YB1 YA4 YA3 YA2 YA1 NONINVERTING OUTPUTS PIN 20 = VCC PIN 10 = GND OUTPUT ENABLES ENABLE A ENABLE B 1 19 PIN ASSIGNMENT A3 A2 YB4 A1 ENABLE A GND YB1 A4 YB2 YB3 5 4 3 2 1 10 9 8 7 6 14 15 16 17 18 19 20 11 12 13 YA2 B4 YA1 ENABLE B VCC B1 YA4 B2 YA3 B3 http://onsemi.com SOIC−20W DW SUFFIX CASE 751D TSSOP−20 DT SUFFIX CASE 948E SOEIAJ−20 M SUFFIX CASE 967 1 1 1 PDIP−20 N SUFFIX CASE 738 1 See detailed ordering, shipping, and marking information in the package dimensions section on page 5 of this data sheet. ORDERING AND MARKING INFORMATION FUNCTION TABLE Inputs Outputs Enable A, Enable B A, B YA, YB LLL LH H HX Z Z = high impedance, X = don’t care |
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