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BUK9620-55 Datasheet(PDF) 3 Page - NXP Semiconductors |
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BUK9620-55 Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 8 page Philips Semiconductors Product specification TrenchMOS ™ transistor BUK9620-55 Logic level FET AVALANCHE LIMITING VALUE SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT W DSS Drain-source non-repetitive I D = 45 A; VDD ≤ 25 V; - - 110 mJ unclamped inductive turn-off V GS = 5 V; RGS = 50 Ω; Tmb = 25 ˚C energy Fig.1. Normalised power dissipation. PD% = 100 ⋅P D/PD 25 ˚C = f(Tmb) Fig.2. Normalised continuous drain current. ID% = 100 ⋅I D/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 5 V Fig.3. Safe operating area. T mb = 25 ˚C I D & IDM = f(VDS); IDM single pulse; parameter tp Fig.4. Transient thermal impedance. Z th j-mb = f(t); parameter D = tp/T 0 20 40 60 80 100 120 140 160 180 Tmb / C PD% Normalised Power Derating 120 110 100 90 80 70 60 50 40 30 20 10 0 1 10 100 1 10 100 1000 ID/A VDS/V RDS(ON) =VDS/ID DC tp = 1 us 10us 100 us 1 ms 10ms 100ms 0 20 40 60 80 100 120 140 160 180 Tmb / C ID% Normalised Current Derating 120 110 100 90 80 70 60 50 40 30 20 10 0 1E-06 0.0001 0.01 1 100 0.001 0.01 0.1 1 10 D = tp tp T T P t D 0.5 0.2 0.1 0.05 0.02 0 Zth/(K/W) t/s April 1998 3 Rev 1.100 |
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