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IS61LV12816 Datasheet(HTML) 5 Page - Integrated Silicon Solution, Inc

Part No. IS61LV12816
Description  128K x 16 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY
Download  12 Pages
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Maker  ISSI [Integrated Silicon Solution, Inc]
Homepage  http://www.issi.com
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IS61LV12816 Datasheet(HTML) 5 Page - Integrated Silicon Solution, Inc

 
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IS61LV12816
Integrated Silicon Solution, Inc. — 1-800-379-4774
5
Rev. C
02/05/2003
ISSI®
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-10 ns
-12 ns
-15 ns
Symbol Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
tRC
Read Cycle Time
10
12
15
ns
tAA
Address Access Time
10
12
15
ns
tOHA
Output Hold Time
3
3
3
ns
tACE
CE Access Time
10
12
15
ns
tDOE
OE Access Time
4
5
6
ns
tHZOE(2)
OE to High-Z Output
4
5
0
6
ns
tLZOE(2)
OE to Low-Z Output
0
0
0
ns
tHZCE(2)
CE to High-Z Output
0
4
0
5
0
8
ns
tLZCE(2)
CE to Low-Z Output
3
3
3
ns
tBA
LB, UB Access Time
4
5
6
ns
tHZB(2)
LB, UB to High-Z Output
0
4
0
5
0
6
ns
tLZB(2)
LB, UB to Low-Z Output
0
0
0
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input
pulse levels of 0V to 3.0V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not
100% tested.
CAPACITANCE(1)
Symbol
Parameter
Conditions
Max.
Unit
CIN
Input Capacitance
VIN = 0V
6
pF
COUT
Input/Output Capacitance
VOUT = 0V
8
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.


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