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CAT24C44GL-TE13 Datasheet(PDF) 6 Page - Catalyst Semiconductor |
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CAT24C44GL-TE13 Datasheet(HTML) 6 Page - Catalyst Semiconductor |
6 / 9 page 6 CAT24C44 Doc. No. 1083, Rev. R © 2005 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice WREN/WRDS The CAT24C44 powers up in the program disable state (the “write enable latch” is reset). Any programming after power-up or after a WRDS (RAM write/EEPROM store disable) instruction must first be preceded by the WREN (RAM write/EEPROM store enable) instruction. Once writing/storing is enabled, it will remain enabled until power to the device is removed, the WRDS instruction is sent, or an EEPROM store has been executed (STO). Figure 4. Write Cycle Timing Figure 3. Read Cycle Timing x 12n SK CE tSKL tSKH 1/FSK tCEH tDH tDS tCES tCDS DI HIGH-Z tPD 6789 10 11 tPD tZ VIH HIGH-Z SK CYCLE # SK CE DI DO D0 D1 Dn The WRDS (write/store disable) can be used to disable all CAT24C44 programming functions, and will prevent any accidental writing to the RAM, or storing to the EEPROM. Data can be read normally from the CAT24C44 regard- less of the “write enable latch” status. |
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