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MC10138P Datasheet(PDF) 3 Page - ON Semiconductor |
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MC10138P Datasheet(HTML) 3 Page - ON Semiconductor |
3 / 8 page MC10138 http://onsemi.com 3 ELECTRICAL CHARACTERISTICS Test Limits Pin Under –30 °C +25 °C +85 °C Characteristic Symbol Under Test Min Max Min Typ Max Min Max Unit Power Supply Drain Cur- rent IE 8 97 70 88 97 mAdc Input Current IinH 12 5,6,10,11 7 9 350 390 460 650 220 245 290 410 220 245 290 µAdc IinL All 0.5 0.5 0.3 µAdc Output Voltage Logic 1 VOH 3,14 (3.) 2,4,13,15 (2.) –1.060 –1.060 –0.890 –0.890 –0.960 –0.960 –0.810 –0.810 –0.890 –0.890 –0.700 –0.700 Vdc Output Voltage Logic 0 VOL 3,14 (2.) 2,4,13,15 (3.) –1.890 –1.890 –1.675 –1.675 –1.850 –1.850 –1.650 –1.650 –1.825 –1.825 –1.615 –1.615 Vdc Threshold Voltage Logic 1 VOHA 2,4,13,15 (2.) 3,14 (3.) 13,15 (2.) –1.080 –1.080 –1.080 –0.980 –0.980 –0.980 –0.910 –0.910 –0.910 Vdc Threshold Voltage Logic 0 VOLA 2,4,13,15 (3.) 3,14 (2.) 13,15 (3.) –1.655 –1.655 –1.655 –1.630 –1.630 –1.630 –1.595 –1.595 –1.595 Vdc Switching Times (50 Ω Load) ns Propagation Clock Delays Delay t12+15+ t12+14+ t7+13+ t7+4+ t7+2+ t7+3+ 15 14 13 4 2 3 1.4 1.4 1.4 1.4 1.4 1.4 5.0 5.0 5.2 5.2 5.2 5.2 1.5 1.5 1.5 1.5 1.5 1.5 3.5 3.5 3.5 3.5 3.5 3.5 4.8 4.8 5.0 5.0 5.0 5.0 1.5 1.5 1.5 1.5 1.5 1.5 5.3 5.3 5.5 5.5 5.5 5.5 t12+15– t12+14– t7+13– t7+4– t7+2– t7+3– 15 14 13 4 2 3 1.4 1.4 1.4 1.4 1.4 1.4 5.0 5.0 5.2 5.2 5.2 5.2 1.5 1.5 1.5 1.5 1.5 1.5 3.5 3.5 3.5 3.5 3.5 3.5 4.8 4.8 5.0 5.0 5.0 5.0 1.5 1.5 1.5 1.5 1.5 1.5 5.3 5.3 5.5 5.5 5.5 5.5 Set Delay t11+15+ t11+14– 15 14 1.4 1.4 5.2 5.2 1.5 1.5 5.0 5.0 1.5 1.5 5.5 5.5 Reset Delay t9+14+ t9+15– 14 15 1.4 1.4 5.2 5.2 1.5 1.5 5.0 5.0 1.5 1.5 5.5 5.5 Rise Time (20 to 80%) t14+ t15+ 14 15 1.1 1.1 4.7 4.7 1.1 1.1 2.5 2.5 4.5 4.5 1.1 1.1 5.0 5.0 Fall Time (20 to 80%) t14– t15– 14 15 1.1 1.1 4.7 4.7 1.1 1.1 2.5 2.5 4.5 4.5 1.1 1.1 5.0 5.0 Counting Frequency fcount 2 15 125 125 125 125 150 150 125 125 MHz 1. Individually test each input; apply VILmin to pin under test. 2. Set all four flip–flops by applying pulse VIHmax VILmin to pins 5, 6, 10, and 11 prior to applying test voltage indicated. 3. Reset all four flip–flops by applying pulse VIHmax VILmin to pin 9 prior to applying test voltage indicated. |
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