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NCP1200P60 Datasheet(PDF) 9 Page - ON Semiconductor |
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NCP1200P60 Datasheet(HTML) 9 Page - ON Semiconductor |
9 / 16 page NCP1200 http://onsemi.com 9 Power Dissipation The NCP1200 is directly supplied from the DC rail through the internal DSS circuitry. The current flowing through the DSS is therefore the direct image of the NCP1200 current consumption. The total power dissipation can be evaluated using: (V HVDC * 11 V) @ ICC2. If we operate the device on a 250 VAC rail, the maximum rectified voltage can go up to 350 VDC. As a result, the worse case dissipation occurs on the 100 kHz version which will dissipate 340 . 1.8 mA@Tj = −25 °C = 612 mW (however this 1.8 mA number will drop at higher operating temperatures). Please note that in the above example, ICC2 is based on a 1 nF capacitor loading pin 5. As seen before, ICC2 will depend on your MOSFET’s Qg: ICC2 = ICC1 + Fsw x Qg. Final calculations shall thus account for the total gate−charge Qg your MOSFET will exhibit. A DIP8 package offers a junction−to−ambient thermal resistance of RqJ−A 100°C/W. The maximum power dissipation can thus be computed knowing the maximum operating ambient temperature (e.g. 70 °C) together with the maximum allowable junction temperature (125 °C): Pmax + T Jmax * TAmax R R qJ*A = 550 mW. As we can see, we do not reach the worse consumption budget imposed by the 100 kHz version. Two solutions exist to cure this trouble. The first one consists in adding some copper area around the NCP1200 DIP8 footprint. By adding a min−pad area of 80 mm2 of 35 m copper (1 oz.) RqJ−A drops to about 75°C/W which allows the use of the 100 kHz version. The other solutions are: 1. Add a series diode with pin 8 (as suggested in the above lines) to drop the maximum input voltage down to 222 V ((2 350)/pi) and thus dissipate less than 400 mW 2. Implement a self−supply through an auxiliary winding to permanently disconnect the self−supply. SOIC−8 package offers a worse RqJ−A compared to that of the DIP8 package: 178 °C/W. Again, adding some copper area around the PCB footprint will help decrease this number: 12 mm x 12 mm to drop RqJ−A down to 100°C/W with 35 m copper thickness (1 oz.) or 6.5 mm x 6.5 mm with 70 m copper thickness (2 oz.). One can see, we do not recommend using the SOIC package for the 100 kHz version with DSS active as the IC may not be able to sustain the power (except if you have the adequate place on your PCB). However, using the solution of the series diode or the self−supply through the auxiliary winding does not cause any problem with this frequency version. These options are thoroughly described in the AND8023/D. Overload Operation In applications where the output current is purposely not controlled (e.g. wall adapters delivering raw DC level), it is interesting to implement a true short−circuit protection. A short−circuit actually forces the output voltage to be at a low level, preventing a bias current to circulate in the optocoupler LED. As a result, the FB pin level is pulled up to 4.1 V, as internally imposed by the IC. The peak current setpoint goes to the maximum and the supply delivers a rather high power with all the associated effects. Please note that this can also happen in case of feedback loss, e.g. a broken optocoupler. To account for this situation, the NCP1200 hosts a dedicated overload detection circuitry. Once activated, this circuitry imposes to deliver pulses in a burst manner with a low duty cycle. The system recovers when the fault condition disappears. During the startup phase, the peak current is pushed to the maximum until the output voltage reaches its target and the feedback loop takes over. This period of time depends on normal output load conditions and the maximum peak current allowed by the system. The time−out used by this IC works with the VCC decoupling capacitor: as soon as the VCC decreases from the VCCOFF level (typically 11.4 V) the device internally watches for an overload current situation. If this condition is still present when VCCON is reached, the controller stops the driving pulses, prevents the self−supply current source to restart and puts all the circuitry in standby, consuming as little as 350 mA typical (ICC3 parameter). As a result, the VCC level slowly discharges toward 0. When this level crosses 6.3 V typical, the controller enters a new startup phase by turning the current source on: VCC rises toward 11.4 V and again delivers output pulses at the UVLOH crossing point. If the fault condition has been removed before UVLOL approaches, then the IC continues its normal operation. Otherwise, a new fault cycle takes place. Figure 20 shows the evolution of the signals in presence of a fault. |
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