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AD8307 Datasheet(PDF) 5 Page - Analog Devices |
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AD8307 Datasheet(HTML) 5 Page - Analog Devices |
5 / 24 page AD8307 Rev. C | Page 5 of 24 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INP VPS ENB INT COM OFS OUT INM AD8307 TOP VIEW (Not to Scale) 1 2 3 4 8 7 6 5 Figure 2. Pin Configuration Table 3. Pin Function Descriptions Pin No. Mnemonic Description 1 INM Signal Input Minus Polarity. Normally at VPOS/2. 2 COM Common Pin (Usually Grounded). 3 OFS Offset Adjustment. External capacitor connection. 4 OUT Logarithmic (RSSI) Output Voltage. ROUT = 12.5 kΩ. 5 INT Intercept Adjustment, ±3 dB (see the Slope and Intercept Adjustments section). 6 ENB CMOS-Compatible Chip Enable. Active when high. 7 VPS Positive Supply: 2.7 V to 5.5 V. 8 INP Signal Input Plus Polarity. Normally at VPOS/2. Due to the symmetrical nature of the response, there is no special significance to the sign of the two input pins. DC resistance from INP to INM = 1.1 kΩ. |
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