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NCP1280DR2 Datasheet(PDF) 3 Page - ON Semiconductor

Part # NCP1280DR2
Description  Active Clamp Voltage Mode PWM Controller for Off-Line Applications
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NCP1280DR2 Datasheet(HTML) 3 Page - ON Semiconductor

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NCP1280
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3
PIN DESCRIPTION
Pin
Name
Application Information
1
Vin
This pin is connected to the input voltage of the system. The voltage can be a rectified, filtered line voltage
or output of a power factor correction (PFC) front end. A constant current source supplies current from this
pin to the capacitor connected on the VAUX pin. The charge current is typically 13.8 mA. Maximum input
voltage is 700 V.
2
NC
Not Connected.
3
UV/OV
Provides protection under line undervoltage and overvoltage conditions. The built in voltage range is
X 2:1. If needed, the OV function can be disabled by a Zener from this pin to ground.
4
FF
An external resistor between Vin and this pin adjusts the amplitude of the Feedforward Ramp in proportion
to Vin. By varying the feedforward ramp amplitude in proportion to the input voltage, open loop line
regulation is improved.
5
CS
Overcurrent sense input. If the CS voltage exceeds 0.48 V or 0.57 V, the converter enters the Cycle by
Cycle or Cycle Skip current limit mode, respectively.
6
CSKIP
The capacitor connected between this pin and ground sets the Cycle Skip period. A soft−start sequence
follows at the conclusion of the fault period.
7
RT
A single external resistor between this pin and GND sets the oscillator fixed frequency.
8
DCMAX
An external resistor between this pin and GND sets the voltage on the Max DC Comparator inverting
input. The duty cycle is limited by comparing the voltage on the Max DC Comparator inverting input to the
Feedforward Ramp.
9
SS
An internal 6.2
mA current source charges the external capacitor connected to this pin. The duty cycle is
limited during startup by comparing the voltage on this pin to the Oscillator Ramp.
10
VEA
The error signal from an external error amplifier, typically supplied through an optocoupler, is fed into this
input and compared to the Feedforward Ramp. A series diode and resistor offset the voltage on this pin
before it is applied to the PWM Comparator inverting input.
11
VREF
Precision 5.0 V reference output. Maximum output current is 6 mA.
12
tD
An external resistor between VREF and this pin sets the overlap delay between OUT1 and OUT2
transitions.
13
OUT2
Output of the PWM controller with leading and trailing edge overlap delay. OUT2 can be used to drive a
synchronous rectifier topology, an active clamp/reset switch, or both.
14
GND
Control circuit ground.
15
OUT1
Main output of the PWM controller.
16
VAUX
Positive input supply voltage. This pin is connected to an external capacitor for energy storage. An
internal current supplies current from Vin to this pin. Once the voltage on VAUX reaches 11 V, the current
source turns OFF. It turns ON again once VAUX falls to 7 V. During normal operation, power is supplied to
the IC via this pin, by means of an auxiliary winding.


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