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T5750-6AQJ Datasheet(PDF) 6 Page - ATMEL Corporation |
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T5750-6AQJ Datasheet(HTML) 6 Page - ATMEL Corporation |
6 / 13 page 6 4546E–RKE–02/07 T5750 Figure 4-2. Output Power Measurement 4.4 Application Circuit For the supply-voltage blocking capacitor C 3 a value of 68 nF/X7R is recommended (see Figure 4-3 on page 7 and Figure 4-4 on page 8). C 1 and C2 are used to match the loop antenna to the power amplifier where C 1 typically is 3.9 pF/NP0 and C2 is 1 pF/NP0; for C2 two capacitors in series should be used to achieve a better tolerance value and to have the possibility to realize the Z Load,opt by using standard valued capacitors. C 1 forms together with the pins of T5750 and the PCB board wires a series resonance loop that suppresses the 1 st harmonic, hence the position of C 1 on the PCB is important. Normally the best suppression is achieved when C 1 is placed as close as possible to the pins ANT1 and ANT2. The loop antenna should not exceed a width of 1.5 mm, otherwise the Q-factor of the loop antenna is too high. L 1 (≈ 50 nH to 100 nH) can be printed on PCB. C 4 should be selected so that the XTO runs on the load resonance frequency of the crystal. Normally, a value of 12 pF results for a 15 pF load-capacitance crystal. 1 nF 1.5 pF 2.7 pF 10 nH C1 C2 C3 L1 VS Rin ANT2 ANT1 ZLopt Power meter 50 Ω Z = 50 Ω |
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