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RTL8201CL-VD Datasheet(PDF) 34 Page - Realtek Semiconductor Corp.

Part # RTL8201CL-VD
Description  SINGLE-CHIP/SINGLE-PORT 10/100M FAST ETHERNET PHYCEIVER
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Manufacturer  REALTEK [Realtek Semiconductor Corp.]
Direct Link  https://www.realtek.com/en/
Logo REALTEK - Realtek Semiconductor Corp.

RTL8201CL-VD Datasheet(HTML) 34 Page - Realtek Semiconductor Corp.

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RTL8201CL
Datasheet
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
28
Track ID: JATR-1076-21 Rev. 1.24
8.2.4.
SNI Reception Cycle Timing
Table 36. SNI Reception Cycle Timing
Symbol
Description
Minimum
Typical
Maximum
Unit
t1
RXCLK high pulse width
36
ns
t2
RXCLK low pulse width
36
ns
t3
RXCLK period
80
120
ns
t4
RXD0 setup to RXCLK rising edge
40
ns
t5
RXD0 hold after RXCLK rising edge
40
ns
t6
Receive frame to CRS high
50
ns
t7
End of receive frame to CRS low
160
ns
t8
Decoder acquisition time
600
1800
ns
Figure 12 shows an example of a packet transfer from PHY to MAC on the SNI interface.
Note: SNI mode only runs at 10Mbps.
RXCLK
RXD0
V
IH(min)
V
IL(max)
V
IH(min)
V
IL(max)
t4
t5
t1
t3
t2
Figure 12. SNI Reception Cycle Timing-1
RXCLK
RXD0
CRS
TPRX+-
t6
t8
t7
Figure 13. SNI Reception Cycle Timing-2
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