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RTL8201CL-VD Datasheet(PDF) 26 Page - Realtek Semiconductor Corp.

Part # RTL8201CL-VD
Description  SINGLE-CHIP/SINGLE-PORT 10/100M FAST ETHERNET PHYCEIVER
Download  39 Pages
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Manufacturer  REALTEK [Realtek Semiconductor Corp.]
Direct Link  https://www.realtek.com/en/
Logo REALTEK - Realtek Semiconductor Corp.

RTL8201CL-VD Datasheet(HTML) 26 Page - Realtek Semiconductor Corp.

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RTL8201CL
Datasheet
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
20
Track ID: JATR-1076-21 Rev. 1.24
7.6. Serial Network Interface
The RTL8201CL also supports the traditional 7-wire serial interface to operate with legacy MACs or
embedded systems. To setup for this mode of operation, pull the MII/SNIB pin low. By doing so, the
RTL8201CL will ignore the setup of the ANE and SPEED pins. In this mode, the RTL8201CL will set
the default operation to 10Mbps and half-duplex mode.
Note: The RTL8201CL also supports full-duplex mode operation if the DUPLEX pin has been pulled high.
This interface consists of a 10Mbps transmit and receive clock generated by PHY, 10Mbps transmit and
receive serial data, transmit enable, collision detect, and carry sense signals.
7.7. Power Down, Link Down, Power Saving, and Isolation
Modes
The RTL8201CL offers four types of Power Saving mode operation. This section describes how to
implement each mode. The first three modes are configured through software, and the fourth through
hardware.
Table 28. Power Saving Mode Pin Settings
Mode
Description
Analog Off
Setting bit 11 of register 17 to 1 will put the RTL8201CL into analog off state. In analog off state,
the RTL8201CL will power down all analog functions such as transmit, receive, PLL, etc. However,
the internal 25MHz crystal oscillator will not be powered down. Digital functions in this mode are
still available, which allows reacquisition of analog functions
LDPS
Setting bit 12 of register 17 to 1, or pulling the LDPS pin high will put the RTL8201CL into LDPS
(Link Down Power Saving) mode. In LDPS mode, the RTL8201CL will detect the link status to
decide whether or not to turn off the transmit function. If the link is off, FLP or 100Mbps
IDLE/10Mbps NLP will not be transmitted. However, some signals similar to NLP will be
transmitted. Once the receiver detects leveled signals, it will stop the signal and transmit FLP or
100Mbps IDLE/10Mbps NLP again. This can cut power used by 60%~80% when the link is down.
PWD
Setting bit 11 of register 0 to 1 puts the RTL8201CL into power down mode. This is the maximum
power saving mode while the RTL8201CL is still alive. In PWD mode, the RTL8201CL will turn off
all analog/digital functions except the MDC/MDIO management interface. Therefore, if the
RTL8201CL is put into PWD mode and the MAC wants to recall the PHY, it must create the
MDC/MDIO timing by itself (this is done by software).
Isolation
This mode is different from the three previous software configured power saving modes. This mode
is configured by hardware pin 43. Setting pin 43 high will isolate the RTL8201CL from the Media
Access Controller (MAC) and the MDC/MDIO management interface. In this mode, power
consumption is minimal.
7.8. Media Interface
7.8.1.
100Base-TX
100Base-TX Transmit Function
Transmit data in 4-bit nibbles (TXD[3:0]) clocked at 25MHz (TXC) is transformed into 5B symbol code
(4B/5B encoding). Scrambling, serializing, and conversion to 125MHz, and NRZ to NRZI then takes
place. After this process, the NRZI signal is passed to the MLT-3 encoder, then to the transmit line driver.
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