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FDD3N40TF Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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FDD3N40TF Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 9 page ©2007 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDD3N40 / FDU3N40 Rev. A February 2007 UniFET TM FDD3N40 / FDU3N40 400V N-Channel MOSFET Features • 2A, 400V, RDS(on) = 3.4Ω @VGS = 10 V • Low gate charge ( typical 4.5 nC) •Low Crss ( typical 3.7 pF) •Fast switching • 100% avalanche tested • Improved dv/dt capability Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies and active power factor correction. Absolute Maximum Ratings Thermal Characteristics D G S I-PAK FDU Series D-PAK FDD Series G S D G S D Symbol Parameter FDD3N40 / FDU3N40 Unit VDSS Drain-Source Voltage 400 V ID Drain Current - Continuous (TC = 25°C) - Continuous (TC = 100°C) 2.0 1.25 A A IDM Drain Current - Pulsed (Note 1) 8.0 A VGSS Gate-Source voltage ±30 V EAS Single Pulsed Avalanche Energy (Note 2) 46 mJ IAR Avalanche Current (Note 1) 2A EAR Repetitive Avalanche Energy (Note 1) 3mJ dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns PD Power Dissipation (TC = 25°C) - Derate above 25 °C 30 0.24 W W/ °C TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C TL Maximum Lead Temperature for Soldering Purpose, 1/8” from Case for 5 Seconds 300 °C Symbol Parameter Typ Max Unit RθJC Thermal Resistance, Junction-to-Case -- 4.2 °C/W RθJA Thermal Resistance, Case-to-Sink Typ. -- 110 °C/W * Drain current limited by maximum junction temperature |
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