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Electrical Characteristics

P82B96

DUAL BIDIRECTIONAL BUS BUFFER

SCPS144A – MAY 2006 – REVISED SEPTEMBER 2006

V

PARAMETER

TEST CONDITIONS

UNIT

MIN

MAX

MIN

MAX

Temperature

∆V/∆T

IN

coefficient of

Sx, Sy

–2

mV/

°C

input thresholds

0.8

0.88

1

(2)

Low-level output

Sx, Sy

V

voltage

0.67

0.73

0.79

(2)

Temperature

coefficient of

∆V/∆T

OUT

Sx, Sy

–1.8

mV/

°C

output low

Quiescent supply current

0.9

1.8

2

mA

Additional supply

∆I

CC

current per pin

Tx, Ty

1.7

2.75

3

mA

low

Dynamic output

sink capability

7

18

5.7

mA

Sx, Sy

Leakage current

0.1

1

1

µA

Dynamic output

sink capability

60

100

60

mA

on buffered bus

bus = 0.4 V

Tx, Ty

Leakage current

0.1

1

1

µA

on buffered bus

Input current

Sx, Sy

–1

1

Input current

–1

1

from buffered bus

µA

Rx, Ry

Leakage current

on buffered bus

1

1.5

input

Input logic-level high

0.65

0.7

(2)

Sx, Sy

Input logic-level low

0.6

0.65

(2)

Input threshold

V

Input logic level high

Rx, Ry

Input threshold

Input logic level low

Input/output logic

at 3 mA) –

Sx, Sy

100

150

100

mV

Sx, Sy

ramping, voltage on

which all buses

1

1

V

Tx, Ty

Tx, Ty lowered until

are released

released

(1)

(2)

See the Typical Characteristics section of this data sheet.

(3)

The output logic low depends on the sink current.

(4)

The input logic threshold is independent of the supply voltage.

(5)

The minimum value requirement for pullup current, 200

µA, ensures that the minimum value for V

While the tolerances on absolute levels allow a small probability that the low from one Sx output is recognized by an Sx input of another

P82B96, this has no consequences for normal applications. In any design, the Sx pins of different devices never should be linked,

6

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