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PCA9554ADBQR Datasheet(PDF) 3 Page - Texas Instruments |
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PCA9554ADBQR Datasheet(HTML) 3 Page - Texas Instruments |
3 / 33 page www.ti.com 14 I/O Port Shift Register 8 Bits LP Filter Interrupt Logic Input Filter 15 Power-On Reset Read Pulse Write Pulse 2 1 13 16 8 GND VCC SDA SCL A1 A0 INT I2C Bus Control P7−P0 3 A2 PCA9554A REMOTE 8-BIT I2C AND SMBus I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS SCPS127A – SEPTEMBER 2006 – REVISED FEBRUARY 2007 TERMINAL FUNCTIONS NO. QSOP (DBQ) SOIC (DW), NAME DESCRIPTION QFN (RGT) AND SSOP (DB), QFN (RGV) TSSOP (PW), AND TVSOP (DGV) 1 15 A0 Address input. Connect directly to VCC or ground. 2 16 A1 Address input. Connect directly to VCC or ground. 3 1 A2 Address input. Connect directly to VCC or ground. 4 2 P0 P-port input/output. Push-pull design structure. 5 3 P1 P-port input/output. Push-pull design structure. 6 4 P2 P-port input/output. Push-pull design structure. 7 5 P3 P-port input/output. Push-pull design structure. 8 6 GND Ground 9 7 P4 P-port input/output. Push-pull design structure. 10 8 P5 P-port input/output. Push-pull design structure. 11 9 P6 P-port input/output. Push-pull design structure. 12 10 P7 P-port input/output. Push-pull design structure. 13 11 INT Interrupt output. Connect to VCC through a pullup resistor. 14 12 SCL Serial clock bus. Connect to VCC through a pullup resistor. 15 13 SDA Serial data bus. Connect to VCC through a pullup resistor. 16 14 VCC Supply voltage FUNCTIONAL BLOCK DIAGRAM A. Pin numbers shown are for the DB, DBQ, DGV, DW, N, or PW package. B. All I/Os are set to inputs at reset. 3 Submit Documentation Feedback |
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