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74HC244 Datasheet(HTML) 1 Page - NXP Semiconductors

Part No. 74HC244
Description  Octal buffer/line driver; 3-state
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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74HC244 Datasheet(HTML) 1 Page - NXP Semiconductors

 
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1.
General description
The 74HC244; 74HCT244 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL).
The 74HC244; 74HCT244 has octal non-inverting buffer/line drivers with 3-state outputs.
The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on
nOE causes the outputs to assume a high-impedance OFF-state. The 74HC244;
74HCT244 is identical to the 74HC240; 74HCT240 but has non-inverting outputs.
2.
Features
s Octal bus interface
s Non-inverting 3-state outputs
s Complies with JEDEC standard no. 7A
s ESD protection:
x HBM EIA/JESD22-A114-C exceeds 2000 V
x MM EIA/JESD22-A115-A exceeds 200 V
s Multiple package options
s Specified from
−40 °Cto+85 °C and from −40 °C to +125 °C
3.
Quick reference data
[1]
CPD is used to determine the dynamic power dissipation (PD in µW):
PD =CPD × VCC2 × fi × N+ ∑(CL × VCC2 × fo) where:
74HC244; 74HCT244
Octal buffer/line driver; 3-state
Rev. 03 — 22 December 2005
Product data sheet
Table 1:
Quick reference data
GND = 0 V; Tamb =25 °C; tr =tf = 6 ns
Symbol Parameter
Conditions
Min
Typ
Max
Unit
74HC244
tPHL,
tPLH
propagation delay
nAn to nYn
VCC =5V; CL =15pF
-
9
-
ns
Ci
input capacitance
-
3.5
-
pF
CPD
power dissipation
capacitance
per buffer; VI = GND to
VCC
[1] -35
-
pF
74HCT244
tPHL,
tPLH
propagation delay
nAn to nYn
VCC =5V; CL =15pF
-
11
-
ns
Ci
input capacitance
-
3.5
-
pF
CPD
power dissipation
capacitance
per buffer; VI = GND to
(VCC − 1.5 V)
[1] -35
-
pF


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