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HS1-80C85RH-8 Datasheet(PDF) 2 Page - Intersil Corporation

Part # HS1-80C85RH-8
Description  Radiation Hardened 8-Bit CMOS Microprocessor
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HS1-80C85RH-8 Datasheet(HTML) 2 Page - Intersil Corporation

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40 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE
(SBDIP) MIL-STD-1835, CDIP2-T40
TOP VIEW
42 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) INTERSIL OUTLINE K42.A
TOP VIEW
Functional Diagram
33
34
35
36
37
38
39
40
32
31
30
29
24
25
26
27
28
21
22
23
HLDA
HOLD
READY
RD
IO/ M
ALE
WR
VDD
S1
S0
A15
A14
A13
A12
A11
A10
A9
A8
13
1
2
3
4
5
6
7
8
9
10
11
12
14
15
16
17
18
19
20
INTR
INTA
SOD
SID
TRAP
RST 7.5
RST 6.5
RST 5.5
GND
X1
X2
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
RESET OUT
RESET IN
CLOCK OUT
HLDA
HOLD
READY
RD
IO/ M
ALE
WR
VDD
S1
S0
A15
A14
A13
A12
A11
A10
A9
A8
RESET
CLOCK
GND
OUT
IN
INTR
INTA
SOD
SID
TRAP
RST 7.5
RST 6.5
RST 5.5
X1
X2
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
RESET
OUT
NC
NC
33
32
39
38
37
36
35
34
42
41
31
30
29
28
27
24
23
22
40
26
25
10
11
4
5
6
7
8
9
1
2
12
13
14
15
16
19
20
21
3
17
18
ACCUMU-
LATOR (8)
TEMP REG
(8)
FLAG (5)
FLIP FLOPS
INSTRUCTION
REGISTER (8)
ARITHMETIC
LOGIC
UNIT
(ALU) (8)
POWER
SUPPLY
VDD
GND
INSTRUCTION
DECODER
AND MACHINE
CYCLE
ENCODING
X1
X2
CLK
GEN
CONTROL
STATUS
DMA
RESET
TIMING AND CONTROL
ADDRESS
A15-A8
CLK
OUT
READY
RD
WR
ALE
S0
S1
IO/M
HLDA
RESET
IN
RESET
OUT
HOLD
BUFFER (8)
ADDRESS
BUS
B REG (8)
D REG (8)
H REG (8)
STACK POINTER (16)
C REG (8)
E REG (8)
L REG (8)
PROGRAM COUNTER (16)
INCREMENTER
ADDRESS LATCH (16)
DECREMENTER
DATA ADDRESS
BUFFER (8)
AD1-AD0
ADDRESS
BUS
INTERRUPT CONTROL
SERIAL I/O CONTROL
8-BIT
INTERNAL DATA BUS
INTA
INTR
RST
TRAP
SID
SOD
5.5
RST
6.5
RST
7.5
HS-80C85RH


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